A computer built from NOR gates: inside the Apollo Guidance Computer

We recently restored an Apollo Guidance Computer1, the computer that provided guidance, navigation, and control onboard the Apollo flights to the Moon. This historic computer was one of the first to use integrated circuits and its CPU was built entirely from NOR gates.2 In this blog post, I describe the architecture and circuitry of the CPU.

Architecture of the Apollo Guidance Computer

The Apollo Guidance Computer with the two trays separated. The tray on the left holds the logic circuitry built from NOR gates. The tray on the right holds memory and supporting circuitry.

The Apollo Guidance Computer was developed in the 1960s for the Apollo missions to the Moon. In an era when most computers ranged from refrigerator-sized to room-sized, the Apollo Guidance Computer was unusual—small enough to fit onboard the Apollo spacecraft, weighing 70 pounds and under a cubic foot in size.

The AGC is a 15-bit computer. It may seem bizarre to have a word size that isn't a power of two, but in the 1960s before bytes became popular, computers used a wide variety of word sizes. In the case of the AGC, 15 bits provided sufficient accuracy to land on the moon (using double- and triple-precision values as needed), so 16 bits would have increased the size and weight of the computer unnecessarily.4

The Apollo Guidance Computer has a fairly basic architecture, even by 1960s standards. Although it was built in the era of complex, powerful mainframes, the Apollo Guidance Computer had limited performance; it is more similar to an early microprocessor in power and architecture.3 The AGC's strengths were its compact size and extensive real-time I/O capability. (I'll discuss I/O in another article.)5

The architecture diagram below shows the main components of the AGC. The parts I'll focus on are highlighted. The AGC has a small set of registers, along with a simple arithmetic unit that only does addition. It has just 36K words of ROM (fixed memory) and 2K words of RAM (erasable memory). The "write bus" was the main communication path between the components. Instruction decoding and the sequence generator produced the control pulses that directed the AGC.

Block diagram of the Apollo Guidance Computer. From Space Navigation Guidance and Control, R-500, VI-14.

About half of the architecture diagram is taken up by memory, reflecting that in many ways the architecture of the Apollo Guidance Computer was designed around its memory. Like most computers of the 1960s, the AGC used core memory, storing each bit in a tiny ferrite ring (core) threaded onto a grid of wires. (Because a separate physical core was required for every bit, core memory capacity was drastically smaller than modern semiconductor memory.) A property of core memory was that reading a word from memory erased that word, so a value had to be written back to memory after each access. The AGC also had fixed (ROM), the famous core ropes used for program storage where bits were physically woven into the wiring pattern (below). (I've written about the AGC's core memory and core rope memory in detail.)

Detail of core rope memory wiring from an early (Block I) Apollo Guidance Computer. Photo from Raytheon.

NOR gates

The Apollo Guidance Computer was one of the very first computers to use integrated circuits. These early ICs were very limited; the AGC's chips (below)2 contained just six transistors and eight resistors, implementing two 3-input NOR gates.

Die photo of the dual 3-input NOR gate used in the AGC. The ten bond wires around the outside of the die connect to the IC's external pins. Photo by Lisa Young, Smithsonian.

The symbol for a NOR gate is shown below. It is a very simple logic gate: if all inputs are low, the output is high. It might be surprising that NOR gates are sufficient to build a computer, but NOR is a universal gate: you can make any other logic gate out of NOR gates. For instance, wiring the inputs of a NOR gate together forms an inverter. Putting an inverter on the output of a NOR gate produces an OR gate. Putting inverters on the inputs of a NOR gate produces an AND gate.6 More complex circuits, such as flip flops, adders, and counters can be built from these gates.

The NOR gate generates a 1 output if all inputs are 0. If any input is a 1 (or multiple inputs), the NOR gate generates a 0 output.

One building block that appears frequently in the AGC is the set-reset latch. This simple circuit is built from two NOR gates and stores one bit of data: the set input stores a 1 bit and the reset input stores a 0 bit. In more detail, a 1 pulse on the set input turns the top NOR gate off and the bottom one on, so the output is a 1. A 1 pulse on the reset input does the opposite so the output is a 0. If both inputs are 0, the latch remembers its previous state, providing storage. The next section will show how the latch circuit is used to build registers.

A set-reset latch built from two NOR gates. If one NOR gate is on, it forces the other one off. The overbar on the top output indicates that it is the complement of the lower output.

The registers

The Apollo Guidance Computer has a small set of registers to store values temporarily outside of core memory. The main register is the accumulator (A), which is used in many arithmetic operations. The AGC also has a program counter register (Z), arithmetic unit registers (X and Y), a buffer register (B), return address register (Q)7, and a few others. For memory accesses, the AGC has a memory address register (S) and a memory buffer register (G) for data. The AGC also has some registers that reside in core memory, such as I/O counters.

The following diagram outlines the register circuitry for the AGC, simplified to a single bit and two registers (Q and Z). Each register bit has a latch (flip-flop), using the circuit described earlier (blue and purple). Data is transmitted both to and from the registers on the write bus (red). To write to a register, the latch is first reset by a clear signal (CQG or CZG, green). A "write service" gate signal (WQG or WZG, orange) then allows the data on the write bus to set the corresponding register latch. To read a register, a "read service" gate signal (RQG or RZG, cyan) passes the latch's output through the write amplifier to the write bus, for use by other parts of the AGC. The complete register circuitry is more complex, with multiple 16-bit registers, but follows this basic structure.

Simplified diagram of AGC register structure, showing one bit of the Q and Z registers. (Source)

The register diagram illustrates three key points. First, the register circuitry is built from NOR gates. Second, data movement through the AGC centers on the write bus. Finally, the register actions (like other AGC actions) depend on specific control signals at the right time; the "control" section of this post will discuss how these signals are generated.

The arithmetic unit

Most computers have an arithmetic logic unit (ALU) that performs arithmetic and Boolean logic operations. Compared to most computers, the AGC's arithmetic unit is very limited: the only operation it performs is addition of 16-bit values, so it's called an arithmetic unit, not an arithmetic logic unit. (Despite its limited arithmetic unit, the AGC can perform a variety of arithmetic and logic operations including multiplication and division, as explained in the footnote.9)

The schematic below shows one bit of the AGC's arithmetic unit. The full adder (red) computes the sum of two bits and a carry. In particular, the adder sums the X bit, Y bit, and carry-in, generating the sum bit (sent to the write bus) and carry bit. The carry is passed to the next adder, allowing adders to be combined to add longer words.8)

Schematic of one bit in the AGC's arithmetic unit. (Based on AGC handbook p214.)

The X register and Y register (purple and green) provide the two inputs to the adder. These are implemented with the NOR-gate latch circuits described earlier. The circuitry in blue writes a value to the X or Y register as specified by the control signals. This circuitry is fairly complex since it allows constants and shifted values to be stored in the registers, but I won't go into the details. Note the "A2X" control signal that gates the A register value into the X register; it will be important in the following discussion.

The photo below shows the physical implementation of the AGC's circuitry. This module implements four bits of the registers and arithmetic unit. The flat-pack ICs are the black rectangles; each module has two boards with 60 chips each, for a total of 240 NOR gates. The arithmetic unit and registers are built from four identical modules, each handling four bits; this is similar to a bit-slice processor.

The arithmetic unit and registers are implemented in four identical modules. Each module implements 4 bits. The modules are installed in slots A8 through A11 of the AGC.

Executing an instruction

This section illustrates the sequence of operations that the AGC performs to execute an instruction. In particular, I'll show how an addition instruction, ADS (add to storage), takes place. This instruction reads a value from memory, adds it to the accumulator (A register), and stores the sum in both the accumulator and memory. This is a single machine instruction, but the AGC performs many steps and many values move back and forth to accomplish it.

Instruction timing is driven by the core memory subsystem. In particular, reading a value from core memory erases the stored value, so a value must be written back after each read. Also, when accessing core memory there is a delay between when the address is set up and when the data is available. The result is that each memory cycle takes 12 time steps to perform first a read and then a write. Each time interval (T1 to T12) takes just under one microsecond, and the full memory cycle takes 11.7µs, called a Memory Cycle Time (MCT).

The erasable core memory module from the Apollo Guidance Computer. This module holds 2 kilowords of memory, with a tiny ferrite core storing each bit. To read memory, high-current pulses flip the magnetization of the cores, erasing the word.

The MCT is the basic time unit for instruction execution. A typical instruction requires two memory cycles: one memory access to fetch the instruction from memory, and one memory access to perform the operation.13 Thus, a typical instruction requires two MCTs (23.4µs), yielding about 43,000 instructions per second. (This is extremely slow compared to modern processors performing billions of instructions per second.)

Internally, the Apollo Guidance Computer processes instructions by breaking an instruction into subinstructions, where each subinstruction takes one memory cycle For example, the ADS instruction consists of two subinstructions: the ADS0 subinstruction (which does the addition) and the STD2 subinstruction (which fetches the next instruction, and is common to most instructions). The diagram below shows the data movement inside the AGC to execute the ADS0 subinstruction. The 12 times steps are indicated left to right.

Operations during the ADS0 (add to storage) subinstruction. Arrows show important data movement. Based on the manual.

The important steps are:
T1: The operand address is copied from the instruction register (B) to the memory address register (S) to start a memory read.
T4: The operand is read from core memory to the memory data register (G).
T5: The operand is copied from (G) to the adder (Y). The accumulator value (A) is copied to the adder (X).
T6: The adder computes the sum (U), which is copied to the memory data register (G).
T8: The program counter (Z) is copied to the memory address register (S) to prepare for fetching the next instruction from core memory.
T10: The sum in the memory data register (G) is written back to core memory.
T11: The sum (U) is copied to the accumulator (A).

Even though this is a simple add instruction, many values are moved around during the 12 time intervals. Each of these actions has a control signal associated with it; for instance, the signal A2X at time T5 causes the accumulator (A) value to be copied to the X register. Copying the G register to the Y register takes two control pulses: RG (read G) and WY (write Y). The next section will explain how the AGC's control unit generates the appropriate control signals for each instruction, focusing on these A2X, RG, and WY control pulses needed by ADS0 at time T5.

The control unit

As in most computers, the AGC's control unit decodes each instruction and generates the control signals that tell the rest of the processor (the datapath) what to do. The AGC is designed with microcoded approach, but the control signals are generated from a hardwired control unit built from NOR gates. Specifically, there are no microinstructions and the AGC does not have a control store holding microcode (which would have taken too much physical space).12You can think of the AGC as implementing the microcode ROM with highly-optimized logic gates.

The heart of the AGC's control unit is called the crosspoint generator. Conceptually, the crosspoint generator takes the subinstruction and the time step, and generates the control signals for that combination of subinstruction and time step. (You can think of the crosspoint generator as a grid with subinstructions in one direction and time steps in the other, with control signals assigned to each point where the lines cross.) For instance, going back to the ADS0 subinstruction, at time T5 the crosspoint generator would generate the A2X, RG, and WY control pulses, causing the desired data movement.

The crosspoint generator required a lot of circuitry and was split across three modules; this is module A6. Note the added wires to modify the circuitry. This is an earlier module used for ground testing; modules in flight did not have these wires.

For efficiency, the implementation of the control unit is highly optimized. Instructions with similar behavior are combined and processed together by the crosspoint generator to reduce circuitry. For instance, the AGC has a "Double-precision Add to Storage" instruction (DAS). Since this is roughly similar to performing two single-word adds, the DAS1 subinstruction and ADS0 subinstruction share logic in the crosspoint generator. The schematic below shows the crosspoint generator circuitry for time T5, highlighting the logic for subinstruction ADS0 (using the DAS1 signal). For instance, the 5K signal is generated from the combination of DAS1 and T5.

Crosspoint circuit for signals generated at time T5. With negative inputs, these NOR gates act as AND gates, detecting a particular subinstruction AND T05. From Apollo Lunar Excursion Manual.

But what are the 5K and 5L signals? These are another optimization. Many control pulses often occur together, so instead of generating all the control pulses directly, the crosspoint generates intermediate crosspoint signals. For instance, 5K generates both the A2X and RG control pulses, while 5L generates the WY control pulse. The diagram below shows how the A2X signal is generated: any of 8 different signals (including 5K) generate A2X.15 Similar circuits generate the other control pulses. These optimizations reduced the size of the crosspoint generator, but it was still large, split across three modules in the AGC.

The A2X control signal is generated from multiple "crosspoint pulses" from the crosspoint generator. The different possibilities are ORed together. From manual, page 4-351.

To summarize, the control unit is responsible for telling the rest of the CPU what to do in order to execute an instruction. Instructions are first decoded into subinstructions. The crosspoint generator creates the proper control pulses for each time interval and subinstruction, telling the AGC's registers, arithmetic unit, and memory what to do.14

Conclusion

This has been a whirlwind tour of the Apollo Guidance Computer's CPU. To keep it manageable, I've focused on the ADS addition instruction and a few of the control pulses (A2X, RG, and WY) that make it operate. Hopefully, this gives you an idea of how a computer can be built from components as primitive as NOR gates.

The most visible part of the architecture is the datapath: arithmetic unit, registers, and the data bus. The AGC's registers are built from simple NOR-gate latches. Even though the AGC's arithmetic unit can only do addition, the computer still manages to perform a full set of operations including multiplication and division and Boolean operations.9

However, the datapath is just part of the computer. The other critical component is the control unit, which tells the data path components what to do. The AGC uses an approach centered around a crosspoint generator, which uses highly-optimized hardwired logic to generate the right control pulses for a particular subinstruction and time interval.

Using these pieces, the Apollo Guidance Computer provided guidance, navigation, and control onboard the Apollo missions, making the Moon landings possible. The AGC also provided a huge boost to the early integrated circuit industry, using 60% of the United States' IC production in 1963. Thus, modern computers owe a lot to the AGC and its simple NOR gate components.

The Apollo Guidance Computer running in Marc's lab, hooked up to a vintage Tektronix scope.

CuriousMarc has a series of AGC videos which you should watch for more information on the restoration project. I announce my latest blog posts on Twitter, so follow me @kenshirriff for future articles. I also have an RSS feed. Thanks to Mike Stewart for supplying images and extensive information.

Notes and references

1. The AGC restoration team consists of Mike Stewart (creator of FPGA AGC), Carl Claunch, Marc Verdiell (CuriousMarc on YouTube) and myself. The AGC that we're restoring belongs to a private owner who picked it up at a scrapyard in the 1970s after NASA scrapped it. ↩

2. In addition to the NOR-gate logic chips, the AGC used a second type of integrated circuit for its memory circuitry, a sense amplifier. (The earlier Block I Apollo Guidance Computer used NOR gate ICs that contained a single NOR gate.) ↩

3. How does the AGC stack up to early microprocessors? Architecturally, I'd say it was more advanced than early 8-bit processors like the 6502 (1975) or Z-80 (1976), since the AGC had 15 bits instead of 8, as well as more advanced instructions such as multiplication and division. But I consider the AGC less advanced than the 16-bit Intel 8086 (1978) which has a larger register set, advanced indexing, and instruction queue. Note, though, that the AGC was in a class of its own as far as I/O, with 227 interface circuits connected to the rest of the spacecraft.

   Looking at transistor counts, the Apollo Guidance Computer had about 17,000 transistors in total in its ICs, which puts it between the Z80 microprocessor (8,500 transistors) and the Intel 8086 (29,000 transistors).

   As far as performance, the AGC did a 15-bit add in 23.4μs and a multiply in 46.8μs. The 6502 took about 3.9μs for an 8-bit add (much faster, but a smaller word). Implementing an 8-bit multiply loop on the 6502 might take over 100μs, considerably worse than the AGC. The AGC's processor cycle speed of 1.024 MHz was almost exactly the same as the Apple II's 1.023 MHz clock, but the AGC took 24 cycles for a typical instruction, compared to 4 on the 6502. The big limitation on AGC performance was the 11.7μs memory cycle time, compared to 300 ns for the Apple II's 4116 DRAM chips.  ↩

4. An AGC instruction fit into a 15-bit word and consisted of a 3-bit opcode and a 12-bit memory address. Unfortunately, both the opcode and memory address were too small, resulting in multiple workarounds that make the architecture kind of clunky.

   The AGC's 15-bit instructions included a 12-bit memory address which could only address 4K words. This was inconvenient since the AGC had 2K words of core RAM and 36K words of core rope ROM. To access this memory with a 12-bit address, the AGC used a complex bank-switching scheme with multiple bank registers. In other words, you could only access RAM in 256-word chunks and ROM in somewhat larger chunks.

   The AGC's instructions had a 3-bit opcode field, which was too small to directly specify the AGC's 34 instructions. The AGC used several tricks to specify more opcodes. First, an EXTEND instruction changed the meaning of the following instruction, allowing twice as many opcodes but wasting a word. Also, some AGC opcodes didn't make sense if performed on a ROM address (such as incrementing), so four different instructions ("quartercode instructions") could share an opcode field. Instructions that act on peripherals only use 9 address bits, freeing up 3 additional bits for opcode use. This allows, for instance, Boolean operations (AND, OR, XOR) to fit into the opcode space, but they can only access peripheral addresses, not main memory addresses.

   The AGC also used some techniques to keep the opcode count small. For example, it had some "magic" memory locations such as the "shift right register". Writing to this address performed a shift; this avoided a separate opcode for "shift right".

   The AGC also had some instructions that wedged multiple functions into a single instruction. For instance, the "Transfer to Storage" instruction not only transferred a value to storage, but also checked the overflow flag and updated the accumulator and skipped an instruction if there had been an arithmetic overflow. Another complex instruction was "Count, Compare, and Skip", which loaded a value from memory, decremented it, and did a four-way branch depending on its value. See AGC instruction set for details. ↩

5. For more on the AGC's architecture, see the Virtual AGC and the Ultimate Apollo Guidance Computer Talk. ↩

6. The NAND gate also has the same property of being a universal gate. (In modern circuits, NAND gates are usually more popular than NOR gates for technical reasons.) The popular NAND to Tetris course describes how to build up a computer from NAND gates, ending with an implementation of Tetris. This approach starts by building a set of logic gates (NOT, AND, OR, XOR, multiplexer, demultiplexer) from NAND gates. Then larger building blocks (flip flop, adder, incrementer, ALU, register) are built from these gates, and finally a computer is built from these building blocks. ↩

7. Modern computers usually have a stack that is used for subroutine calling and returning. However, the AGC (like many other computers of its era) didn't have a stack, but stored the return address in a link register (the AGC's Q register). To use recursion, a programmer would need to implement their own stack. ↩

8. A carry-skip circuit improves the performance of the adder. The problem with binary addition is that propagating a carry through all the bits is slow. For example, if you add 111111111111111 + 1, the carry from the low-order bit gets added to the next bit. This generates a carry which propagates to the next bit, and so forth. This "ripple carry" causes the addition to be essentially one bit at a time. To avoid this problem, the AGC uses a carry-skip circuit that looks at groups of four bits. If there is a carry in, and each position has at least one bit set, there is certain to be a carry, so a carry-out is generated immediately. Thus, propagating a carry is approximately three times as fast. (With groups of four bits, you'd expect four times as fast, but the carry-skip circuit has its own overhead.) ↩

9. You might wonder how the AGC performs a variety of arithmetic and logic operations if the arithmetic unit only supports addition. Subtraction is performed by complementing one value (i.e. flipping the bits) and then adding. Most computers have a complement circuit built into the ALU, but the AGC is different: when the B register is read, it can provide either the value or the complement of the stored value.10 So to subtract a value, the value is stored in the B register and then the complement is read out and added.

   What about Boolean functions? While most computers implement Boolean functions with logic circuitry in the ALU, the Apollo Guidance Computer manages to implement them without extra hardware. The OR operation is implemented through a trick of the register circuitry. By gating two registers onto the write bus at the same time, a 1 from either register will set the bus high, yielding the OR of the two values. AND is performed using the formula A ∧ H = ~(~A ∨ ~H); complementing both arguments, doing an OR, and then complementing the result yields the AND operation. XOR is computed using the formula A ⊕ H = ~(A ∨ ~H) ∨ ~(H ∨ ~A), which uses only complements and ORs. It may seem inefficient to perform so many complement and OR operations, but since the instruction has to take 12 time intervals in any case (due to memory timing), the multiple steps don't slow down the instruction.

   Multiplication is performed by repeated additions, subtractions, and shifts using a Radix-4 Booth algorithm that operates two bits at a time. Division is performed by repeated subtractions and shifts.11 Since multiply and divide require multiple steps internally, they are slower than other arithmetic instructions. ↩

10. Since a latch has outputs for both a bit and the complement of the bit, it is straightforward to get the complemented value out of a latch. Look near the bottom of the schematic to see the B register's circuitry that provides the complemented value. ↩

11. The AGC's division algorithm is a bit unusual. Instead of subtracting the divisor at each step, a negative dividend / remainder is used through the division and the divisor is added. (This is essentially the same as subtracting the divisor, except everything is complemented.) See Block II Machine Instructions section 32-158 for details. ↩

12. The AGC doesn't use microcode but confusingly some sources say it was microprogrammed. The book "Journey to the Moon" by Eldon Hall (creator of the AGC) says:

    The instruction selection logic and control matrix was a microprogrammed instruction sequence generator, equivalent to a read-only memory implemented in logic. Outputs of the microprogrammed memory were a sequence of control pulses that were logic products of timing pulses, tests of priority activity, instruction code, and memory address.

    This doesn't make sense, since the whole point of microprogramming is to use read-only memory instead of hardwired control logic. (See A brief history of microprogramming, Computer architecture: A quantitative approach section 5.4, or Microprogramming: principles and practices.) Perhaps Hall means that the AGC's control was "inspired" by microprogramming, using a clearly-stated set of sequenced control signals with control hardware separated from the data path (like most modern computers, hardwired or microcoded). (In contrast, in many 1950s computers (like the IBM 1401) each instruction's circuitry generated its own ad hoc control signals.)

    By the way, implementing the AGC in microcode would have required about 8 kilobytes of microcode (79 control pulses for about 70 subinstructions with 12 time periods. This would have been impractical for the AGC, especially when you consider that microcode storage needs to be faster than regular storage.  ↩

13. While instructions typically used two subinstructions, there were exceptions. Some instructions, such as multiply and divide, required multiple subinstructions because they took many steps. On the other hand, the jump instruction (TC) used a single subinstruction since fetching the next instruction was the only task to do. ↩

14. Other processors use different approaches to generate control signals. The 6502 and many other early microprocessors decoded instructions with a Programmable Logic Array (PLA), a ROM-like way of implementing AND-OR logic. The Z-80 used a PLA, followed by logic very similar to the crosspoint generator to generate the right signals for each time step. Many computers use microcode, storing the sequence of control steps explicitly in ROM. Since minimizing the number of chips in the AGC was critical, optimizing the circuitry was more important than using a clean, structured approach.

    

    Die photo of the 6502 microprocessor. The 6502 used a PLA and random logic for the control logic, which occupies over half the chip. Note the regular, grid-like structure of the PLA. Die photo courtesy of Visual 6502.

     ↩

15. Each subinstruction's actions at each time interval are described in the manual. The control pulses are described in detail in the manual. (The full set of control pulses for ADS0 are listed here.) ↩

Reverse-engineering precision op amps from a 1969 analog computer

We are restoring a vintage1 computer that CuriousMarc recently obtained. Analog computers were formerly popular for fast scientific computation, but pretty much died out in the 1970s. They are interesting, though, as a completely different computing paradigm from digital computers. In this blog post, I'm going to focus on the op amps used in Marc's analog computer, a Simulators Inc. model 240.

The Model 240 analog computer from Simulators Inc. was a "precision general purpose analog computer" for the desk top, with up to 24 op amps. (This one has 20 op amps.)

What's an analog computer?

An analog computer performs computations using physical, continuously changeable values such as voltages. This is in contrast to a digital computer that uses discrete binary values. Analog computers have a long history including gear mechanisms, slide rules, wheel-and-disk integrators, tide computers, and mechanical gun targeting systems. The "classic" analog computers of the 1950s and 1960s, however, used op amps and integrators to solve differential equations. They were typically programmed by plugging cables into a patch panel, yielding a spaghetti-like tangle of wires.

An analog computer was "programmed" by plugging wires into the patch panel. This panel is from an EAI analog computer at the Computer History Museum.

The big advantage of analog computers was their speed. They computed results almost instantaneously with their components operating in parallel, while digital computers needed to chug away performing calculations, often for a long time. This made analog computers especially useful for real-time simulations. A disadvantage of analog computers is they were only as accurate as their components; if you wanted 4 digits of accuracy, you needed expensive 0.01% accurate resistors. (In contrast, digital computers can be made as accurate as desired simply by using more bits of precision.) Unfortunately for analog computers, digital computers became exponentially faster and more powerful, so by the 1970s there was little reason to use analog computers.

Inside the analog computer

The heart of the analog computer was its operational amplifiers or op amps. Op amps could sum and scale their inputs, providing basic mathematics. But more importantly, integrators were constructed by combining an op amp with a precision capacitor (below). An integrator computed the integral of its input over time by charging the capacitor. This allowed analog computers to solve differential equations. (It may seem strange that integration, a mathematically sophisticated operation, was a basic building block of analog computers, but that's the way the hardware worked out.)

The integrators in the analog computer used large precision capacitors. The adjustable capacitor on top is 10 nanofarads, while the large metal box below is an adjustable 10 microfarad capacitor. These capacitors were designed for very low leakage so the integrated value wouldn't leak away. In front are relays to select the capacitors.

Analog computers used multiple potentiometers (below) to set input values and scaling constants. These potentiometers rotated through 10 turns to provide high accuracy. A voltmeter was used to check the potentiometer values. The voltmeter could also be used to display output values, but more often, outputs were displayed on an oscilloscope, strip chart, or X-Y plotter.

At top, the digital section of the analog computer. The potentiometers are below; some were not installed in this model of the computer. The blank panel in the upper left could hold a digital voltmeter.

Some analog computers included digital components such as gates, flip flops, one-shots, and counters. This functionality supported more complex techniques, such as iterating through a solution space. Marc's computer has some digital logic, accessed through the colorful patch panel shown above.

The photo below shows the computer partially disassembled. The computer is more complex inside than I expected, with many circuit boards. The patch panel has been removed, revealing the grid of contacts behind it. When a cable is plugged into the patch panel, the cable connects to these contacts, wiring up the program. The computer has five modules behind the patch panel; the leftmost module has been removed and is sitting in front of the computer.2 The boards visible at the top of the computer support the digital logic and two analog multipliers. The power supply and circuitry for the front panel are at the bottom.

The analog computer with the sides removed to show the internal circuitry. One module has been removed and placed in front of the computer.

A closeup of a module is shown below, with the patch panel contacts in front. The module's eight circuit boards can be seen at the back. From left to right, the boards are four op amps (4 boards), miscellaneous circuitry (1 board), and a multiplier (3 boards). Multiplication was surprisingly difficult to implement in an analog computer; the three boards implement a single circuit to multiply two values.3

One of the modules. The "fingers" on front contact plugs inserted into the patch panel. Square high-precision (0.01%) resistors are visible behind the fingers.

The op amps

In the above photo, each op amp took up a full board of components. Each board includes an op amp integrated circuit, which raises the question of why so many other components are required. The reason is that analog computers placed heavy demands on op amp performance. In particular, the op amps need to work with signals at DC and at low frequencies, and op amps inconveniently perform poorly in this range, operating better at higher frequencies.

In 1949, a solution to op amp problems at low frequencies was developed: the chopper op amp.4 The idea is that a chopper modulates the input at, say 400 Hz. The op amp happily amplifies this 400-Hz AC signal. A second chopper demodulates the AC output back to DC5, providing much better performance than directly amplifying the DC signal.4 The op amp boards in the analog computer add a chopper circuit to the IC op amp to improve its performance.6

The diagram below shows one of the op amp boards.8 The op amp's single input7 is on the right (separated from all the other connections on the left, to avoid noise). The input is split into three paths. The first path is to the DC chopper amplifier. The signal goes through a low-pass filter (i.e. resistor and capacitor) to extract the DC and low-frequency signal. The chopper itself is pretty simple: a JFET transistor alternately grounds the signal as driven by an external 400 Hz oscillator. This modulated 400 Hz signal is fed to the op amp IC, an Amelco 809 high-performance op amp, introduced in 1967.9 The IC is in a round metal can; this packaging was common back then and helped shield the op amp from noise. Finally, the IC's output goes through a second chopper and filter to demodulate it.

An op amp board from the analog computer with functional groups labeled. Even though the board uses an integrated circuit op amp, many additional circuits are necessary to obtain the performance required.

Next, the second input path is combined with the DC amplifier's output. Most op amps are based around a differential pair, and this board is no exception. In a differential pair, two transistors provide high-gain amplification of the difference between two input signals. This differential pair's inputs are the board's input and the signal from the DC chopper amp so it amplifies both the original input and the DC signal. The two transistors in the differential pair need to be exactly balanced for the op amp to function accurately. In particular, the two transistors need to be kept at the same temperature, so they are fastened together with a metal clip (below).

Critical transistors are held together with metal clips to ensure they stay at the same temperature. The differential pair is on the right, while the transistors on the left buffer the inputs.

The third input path goes to the AC amplifier. The input goes through a high-pass filter (resistor and capacitor) and then a simple transistor buffer. This "feedforward" signal is combined with the output from the differential pair to improve the amplifier's frequency response. At this point, the input has been amplified three different ways to yield good low-frequency and high-frequency performance.

The final stage of the op amp board is an output amplifier to provide high-current output for use by the rest of the computer. This amplifier is implemented with a Class AB amplifier circuit. Individual transistors at the time weren't sufficiently powerful, so it uses two NPN transistors and two PNP transistors to drive the output.

Each op amp board has its input and output wired to the patch panel. On the patch panel below, the op amps (A1 through A4) are shaped like pieces of pie; their inputs are green and outputs are red. The op amps used for integrators are also wired to the integration capacitors.

Detail of the patch panel showing the connections for op amps A1, A3, and A4. The inputs are green and the outputs are red. Initial conditions (IC) are in white. The potentiometer connections are above (yellow).

On the patch panel, each op amp has multiple input plugs with different resistor values for scaling; these are the "10" and "100" numbers above. The photo below shows these high-precision resistors (black cylinders) attached directly to the patch panel contacts. Integrator inputs are controlled by relays (below) and electronic switches so the analog computer can initialize the integration capacitors, run the computation, and then hold the result for analysis.

Resistors (black cylinders) are attached directly to the patch panel contacts. The relays in the middle control the computer's different states: initial constants, operate, and hold. The circuit boards plug into the green connectors at the bottom.

Conclusion

Even though op amp integrated circuits existed in the late 1960s, their performance wasn't good enough for analog computers. Instead, a whole board of components was used for a single op amp, combining the IC op amp with a chopper and other circuitry to yield a high-precision op amp. Although improvements in integrated circuits led to exponential increases in digital computer performance, analog computers received much smaller benefits from ICs. As a result, digital computers almost entirely took over and analog computers are now historical artifacts.

The removable patch panel for the analog computer. The computer was programmed by plugging wires into the holes. The panel is removable, so one programmer could use the analog computer while another is wiring up a panel. (Click to enlarge.)

You might wonder why I'm studying the circuitry of this analog computer in such detail. The reason is that we're trying to restore the computer, but we don't have documentation.1011 Thus, I'm reverse-engineering it to determine how to restore it to operating condition and how to program it. While the circuit boards are not too complex, the computer contains many different boards to analyze. The hardest part is figuring out the connectivity of the many tightly-bundled wiring harnesses, mostly by brute-force beeping out connections with a multimeter.

You can expect more analog computer posts as we continue the restoration. Follow me on Twitter @kenshirriff to stay informed of future articles. I also have an RSS feed.

Notes and references

1. The computer's integrated circuits have 1968 and 1969 date codes on them, so I think the computer was manufactured in 1969. ↩

2. When fully populated, the computer has 6 modules behind the patch panel, but the one on the right is missing. At first, we thought the module had been lost at some point, but it appears that this computer was a lower-cost model and was never fully populated. Evidence of this is that 1/4 of the potentiometers above the patch panel are not installed; these potentiometers would be handled by the missing module. ↩

3. Analog computers could implement arbitrary functions using diode-resistor networks. (Each diode turned on at a particular input voltage level, and contributed a ramp to the output.) For multiplication, diode-resistor networks were configured to implement a parabolic function (i.e. squaring). Multiplication was implemented through the identity X×Y = ((X+Y)² - (X-Y)²)/4. The sum and difference were computed using op amps, while squaring was done with the parabolic function generator. ↩

4. Modern chopper op amps use a more complex chopper-stabilizing mechanism, with two op amps. A secondary op amp uses the chopped signal to null out the main op amp. This tutorial discusses the difference between the classic and modern chopper op amps; there's also a discussion here. The point of this footnote is to avoid confusion between the design of chopper op amps used in the analog computer and modern chopper designs. ↩

5. You can sort of think of the chopper as performing amplitude modulation on the signal, like an AM radio signal. However, the demodulation needs to be "phase-sensitive" so it can tell the difference between a positive input and a negative input. This is in contrast to AM-radio demodulation, which can be done with a diode since phase doesn't matter. ↩

6. The diagram below (from the brochure) shows the structure of the op amp board. The basic idea is that part of the input goes through a capacitor (i.e. high-pass filter) into the AC amplifier. The input also goes into the "DC stabilizer amplifier", which has a chopper on its input. The output is demodulated and put through a low-pass filter (resistor/capacitor). The two amplifier outputs are combined and fed into the "DC amplifier", the output amplifier.

   

   Simplified schematic of the op amp.

   Note the circuitry for overload detection and protection. In an analog computer, overload can easily happen if any of the values get higher than expected and exceed the op amp limits (+/- 10 volts). This is bad because it will cause the results to be wrong. The op amp detects overload and illuminates a panel light so the user knows there is a problem. An important part of analog computer programming is how to scale everything so the mathematical values fit within the physical limits of the system. ↩

7. Nowadays, op amps have a positive and negative input. In analog computers, however, op amps usually had just the negative input. Thus, they summed and inverted their inputs. ↩

8. For reference, I've reverse-engineered the pinout of the op amp board. The input is two shorted pins on the right. The pins along the left of the board (with their connector label) are:
   L: balance in
   K: chopper ground
   J: overload signal out
   H: chopper drive in
   F: ground
   E: ground
   D: -15V
   C: +15V
   B: op amp output
   A: unused ↩

9. Although now almost forgotten, Amelco was an important semiconductor company producing high-performance op amps. Among other things, Amelco made the first JFET op amp. It was founded by Hoerni (who invented the "planar process" for ICs at Fairchild). I reverse-engineered a hybrid Amelco op amp and discuss the history of Amelco in this article. The Amelco 809C op amp datasheet can be found here. ↩

10. As far as documentation on this computer, archive.org has a Simulators Inc 240 brochure scanned from "Ted Nelson's Junk Mail". The Analog Computer Museum has a brochure in German for the Dornier 240, an almost identical computer. (I haven't been able to find out the relationship between Simulators Inc and Dornier, but presumably one company licensed it from the other.) ↩

11. If you're looking for books on analog computers, here are my comments on ones I've read recently:
    Analog computer programming is a modern book on analog computers, and a good place to start.
    Introduction to analog computer programming is a reasonable introduction; the PDF is online.
    Analog and analog/hybrid computer programming comprehensively explains how to solve many different types of problems.
    Electronic analog and hybrid computers has a detailed discussion of the hardware implementations of analog computers of this era.
    Analog and hybrid computing provides a basic description of analog computers and their programming.
    Analog computer techniques is hard to follow and from the vacuum tube era, so I don't recommend it. ↩

Risky line printer music on a vintage IBM mainframe

At the Computer History Museum, we recently obtained card decks for a 50-year-old computer music program. Back then, most computers didn't have sound cards but creative programmers found a way to generate music by using the line printer.2 We were a bit concerned that the program might destroy the printer, but we took the risk of running it on the vintage IBM 1401 mainframe. As you might expect, music from a line printer sounds pretty bad, but the tunes are recognizable and the printer survived unscathed.1

The IBM 1401 business computer was announced in 1959 and went on to become the best-selling computer of the mid-1960s, with more than 10,000 systems in use. A key selling point of the IBM 1401 was its high-speed line printer, the IBM 1403. By rapidly rotating a chain of characters (below), the printer produced output at high speed (10 lines per second) with excellent print quality, said to be the best printing until laser printers were introduced in the 1970s.

The type chain from the IBM 1401's printer. The chain has 48 different characters, repeated five times.

Line printers produced a lot of noise, but programmers soon discovered that by printing specific lines of characters, the noise had specific frequencies. It was possible to play a tune by printing the right lines for each note. Around 1970, computer scientist Ron Mak coded up some songs on punch cards using an earlier music program. He recently came across his old programs and gave us the opportunity to try them out.

How the line printer works

To print characters, the printer uses a chain of type slugs that rotates at high speed in front of the paper, with an inked ribbon between the paper and the chain. The printer produces 132-column output so each of the 132 print columns has a hammer and an electromagnet. At the right moment when the desired character passes the hammer, an electromagnet drives the hammer against the back of the paper, causing the paper and ribbon to hit the type slug, printing the character.

Printing mechanism of the IBM 1401 line printer. From 1401 Reference Manual, p11.

The printer required careful timing to make this process work. The chain spins around rapidly at 7.5 feet per second and every 11.1 µs, a print slug lines up with a hammer. The control circuitry has just enough time to read that position's character from core memory, compare it to the character under the hammer, and fire the hammer if there is a match. After 132 time intervals, each hammer has had an opportunity to print one character; this is called a "scan".3 Since there are 48 characters in the character set (no lower case), this process must be repeated 48 times so all the characters can be printed in any column.54 During each scan, the chain moves by just a single character's width6.

A hammer bank in the IBM 1403 printer. At the bottom, the impact points for the 132 hammers (one for each column) are visible. The coils and wiring for 1/4 (33) of the 132 hammers are visible at the top.

The photo below is a closeup of a hammer. The electromagnet coil and wires are on the upper left. We had to replace this hammer after the coil overheated and smoked; you can see a blackened region on the coil. (This problem happened a while ago due to a bad circuit board, and is unrelated to the printer music.)

An individual hammer from the IBM 1403 printer.

Generating music

Now that you see how the printer works, with a hammer potentially firing every 11.1 µs, the strategy to make music should be clearer. By printing carefully-selected text, you can control the times at which hammers fire. By firing hammers at specific intervals, you can create a desired frequency. An A note (440 Hz), for instance, can be produced by printing a line of text that fires the hammers every 1/440th of a second. This can be done by printing a 1 in column 1 (the first hammer to be aligned), followed by a # in column 14 on the next scan, a comma in column 30 the scan after that, and so forth. (There's no real pattern to this; it's just how things line up.3) The full line printed to generate this note is below.7 (It may be a bit surprising that with a character set of just 48 characters, the printer includes unusual characters such as ⌑ and ‡.)

1    ⌑Y     C#    0   Q     3,    ‡F      R T   4 -   ,   I     U     $7        M   V .   *        9N     ⌑        ZE     @     P3

The diagram below shows the timing of the hammers, illustrating the uniform 440 Hz frequency produced by the above print line. The diagram has time on the X-axis, with a red bar when each character is printed. The red bars are spaced evenly with a spacing of 1/440th of a second, generating a 440 Hz note. Each bar is labeled with the associated character and column on the page. Note that characters are printed in a different order from how they appear on the line. There's no simple relationship between the arrangement of characters on the line and their time sequence. There are a few gray lines where you'd expect a hammer to fire, but no character is printed. These correspond to times when the chain is syncing up and can't print.

Timing diagram for the note A4. Each red line indicates a printed character.

By printing a different line, a different note can be produced. Below is the note B5, which is 987 Hz (over an octave higher). As you'd expect, the higher-frequency note has more characters.

1 @EQ4S J   8. N D ‡  S H 7 AM  Y#2   G-  KV . 0 D  Q S J 7&   N D ‡/4  H   AMX0  2 Q G J   W. 0 DP‡  S   7&AM     ‡/4G   *  MX0 D 3

Timing diagram for the note B5. Each red line indicates a printed character.

The printed line for the low note C♯3 (138 Hz) is below. I was puzzled at first why this line (and the other C♯ notes) had all the characters clustered together, rather than scattered across the line like other notes. It turns out that 138 Hz just happens to correspond to hammers that are consecutive on the line. Even though the characters are clumped together on the line, they are spread out uniformly in time.

16#UZKP*E&38                                                                                                                      

Timing diagram for the note C♯3.

Why chain music might be risky

We were concerned that the print chain music program might damage the printer. There are plenty of stories of people destroying line printers by printing a line that fires all the hammers at once. I think these are mostly urban legends (among other things, the hammers on the 1403 fire one at a time, not all at once). Nonetheless, we were somewhat concerned about chain music overstressing the print chain and breaking it. The photo below shows a print chain that broke during normal use; you can see the broken wires and the individual type slugs.

A broken 1403 print chain. It broke during normal use, not from line printer music. (Photo from TechWorks.)

Print chain were manufactured by winding a thin wire into a band, with type blocks attached. Up until recently, print chains were rare and irreplaceable; if the wire broke, there was no way to fix it. However, the Techworks! museum in Binghamton, NY recently developed a technique to rebuild print chains. Because of this, Frank King (our IBM 1401 guru) approved the use of a rebuilt chain for line printer music, with some trepidation. Fortunately, the chain survived the music generation just fine. (After studying the music program carefully, I think it puts less stress on the chain than the average program, unless there's some really unfortunate resonance.)

Closeup of the type chain (upside down) for an IBM 1403 line printer.

The program

Card decks to play a variety of songs, courtesy of Ron Mak.

The source code to the program is long gone, so I disassembled the machine code on the cards to determine how the program works (listing here). First, it reads "frequency cards" that define what line to print for each note. It builds up an array of print lines in memory, along with a table of note names and addresses of the print lines. Next, the program reads the notes of the song, one note per card. (As you can see above, some songs require many cards.) For each note, it looks up the appropriate print line in the note table. Based on the note's duration, it prints the line the appropriate number of times (using a jump table, not a loop). A rest is implemented by looping 200 to 2000 times to provide silence for the appropriate delay.

A closeup of cards with the machine code for the music program. For some reason, the contents of each card are printed twice on the card.

Machine code for the 1401 is very different from modern machines. One difference is that self-modifying code was very common, while nowadays it is usually frowned upon. For instance, the table of print lines is created by actually modifying load instructions, replacing the address field in the instruction. Even subroutine returns use self-modifying code, putting the return address into a jump instruction at the end of the subroutine. To handle a note, the program generated on-the-fly a sequence of three instructions to load the print line, jump to the print code, and then jump back to the main loop. Self-modifying code made it more challenging for me to understand the program since the disassembled code isn't what actually gets run.

The program cards are followed by frequency cards, defining the print line for each note. The code supported up to 20 different notes, so the frequency cards were selected according to the song's need. Each 132-column line is split across two cards, with the first card defining the right half of the line. Each card is punched at the right with the note name and frequency.

Frequency cards. Each pair of cards defines the 132-character print line that generates the specified note. At the right, the card is punched with the note name (e.g. E4) and frequency (e.g. 329 Hz). The notation F/C labels the first card in the deck.

The final set of cards creates the tune, with one card per note (or rest). Each card is punched with a note and duration. A long song may use hundreds of cards. It is straightforward to create a new song, just a matter of punching the tune onto cards. The notes are specified in Standard Pitch Notation with the note name followed by an octave number. For example, C4 is middle C. Since only some print chains had the # symbol, sharps were indicated with an "S", e.g. CS for C♯.

Closeup of the cards for the song Silver Bells. Each card has the note and octave, followed by its duration. The first card is (confusingly) "END", indicating the end of the frequency cards.

Conclusion

We succeeded in generating music on the IBM 1403 printer, running programs that hadn't been run in almost 50 years. Although the music quality isn't very good, we were happy that the printer didn't self-destruct. Ron Mak last ran these programs in 1970; this link has some songs from then, such as Raindrops keep fallin' on my head. The video below shows an excerpt of La Marseillaise; in this video you can see each line being printed.

I announce my latest blog posts on Twitter, so follow me at @kenshirriff for future articles. I also have an RSS feed. The Computer History Museum in Mountain View runs demonstrations of the IBM 1401 on Wednesdays and Saturdays so if you're in the area you should definitely check it out (schedule). Thanks to Ron Mak for supplying the vintage programs, Carl Claunch for reading the cards, and the 1401 restoration team for running the program, in particular, Robert Garner and Frank King.

Notes and references

1. In case you're wondering why nothing shows up on the printer in the video, the printer's line feed was disabled to save paper. You can see the lines being printed in the video at the end of the article. ↩

2. Programmers also used the 1401 to generate music on an AM radio via RF interference. Running the right instruction sequence generated a particular tone. We hope to try this in the future. ↩

3. I've created an animation of the print chain here that shows exactly how it works; it's more complex than you'd expect. ↩

4. The print chain and hammer alignment scheme may seem excessively complicated. But what makes it clever is that the 11.1 µs between hammer times is just enough time to read a character from core memory to see if it matches the chain slug under the hammer, and thus should be printed. In other words, the system is designed to match the mechanical speed of the chain to the electronic speed of core memory. ↩

5. The printer's operation is explained in detail in the Field Engineering Manual of Instruction. The section starting on page 37 discusses the chain timing in detail. Each scan is broken down into 3 subscans, but I won't get into that here. Note that while a line is 132 characters, printing a line takes about 150 time intervals (1665 µs); the extra time is used to sync the chain position. (This explains why some notes have "missing" characters in the timing plots.) ↩

6. The chain only moves 1/1000 of an inch during the 11.1 µs time., but that is enough to line up the next character and hammer. The trick that makes this work is that the hammer spacing and the chain spacing are very slightly different (a vernier mechanism), so a tiny chain movement causes a much larger change in the alignment position. ↩

7. I've archived the code and full set of frequency cards here for future reference. ↩

Reliable after 50 years: The Apollo Guidance Computer's switching power supplies

We recently restored an Apollo Guidance Computer, the revolutionary computer that helped navigate to the Moon and land on its surface.1 At a time when most computers filled rooms, the Apollo Guidance Computer (AGC) took up just a cubic foot. This blog post discusses the small but complex switching power supplies that helped make the AGC compact enough to fit onboard the spacecraft.

Inside the Apollo Guidance Computer. The power supplies are the tangles of wires on the far left.

The photo above shows the Apollo Guidance Computer after separating its two trays. Tray A on the left holds the logic and interface modules, while Tray B on the right has the memory circuitry. The AGC has two power supplies in Tray A on the far left: a +4V power supply and a +14V power supply; the power supplies look like a tangle of wires in the photo. The logic circuitry, entirely built from NOR gates, was powered by 4 volts. The interface circuitry and memory used the 14 volt supply.

The spacecraft generated 28 volts from fuel cells, which combined hydrogen and oxygen to produce both water and electricity.3 The task of the power supplies was to convert the spacecraft's 28 volts into the 4 and 14 volts required by the computer.2 The 4-volt power supply could output about 10 amps (i.e. 40 watts) while the 14-volt power supply could output about 5 amps (i.e. 70 watts).4 Thus, the power supplies are roughly equivalent to laptop chargers (although a laptop charger deals with more challenging AC line voltages).

The power supply module in front of the AGC. The module in position A30 provides +14 volts, while the (identical) module in position A31 provides +4 volts.

Cordwood construction

The power supplies, like the AGC's other non-logic modules, were built with cordwood construction. In this high-density technique, cylindrical components were inserted into holes in the module, passing through the module, with their leads exiting on either side.6 The left side of the photo below contains resistors, capacitors, and diodes. Because of the cordwood construction, the components are not visible except for the ends of their leads poking through holes. Point-to-point wiring connected the components with welded connections. (The other side of the module is similar, connecting the other ends of the components.) The shiny rectangle on the right is a relay, used to shut off power for standby operation. The ends of large filter capacitors are visible below the relay.

Cordwood construction in the power supply. On the left, components are mounted vertically through the module, with welded wiring on both sides. The metallic box on the right is a relay. Underneath the relay, the ends of filter capacitors are visible.

Cordwood construction was used for high density in applications from aerospace to Cray's CDC 6600 computer. For flight, the AGC's cordwood wiring was encased (potted) in epoxy, protecting it from vibration.

How the power supplies worked

Because the power supplies needed to be lightweight and efficient, they were switching power supplies, an unusual technology for the time. Most computers back then used linear power supplies, which were simpler but much too inefficient for the AGC since excess voltage is turned into waste heat.5 A switching power supply, on the other hand, switches the input voltage on and off at a high frequency. This yields the desired output voltage with very little wasted energy.

The AGC's power supplies used a common switching circuit called a buck converter, which converts an input voltage to a lower voltage. The diagram below shows the key components: a switch (transistor), inductor, diode, and capacitor. The key idea is that if the switch is closed for more time, more of the input voltage will appear across the load. Thus, the output voltage is controlled by the switch timing. The inductor stores energy and releases it when the switch is open, producing a relatively stable output.

A buck converter rapidly switches between the on state and the off state. When on, current flows from the voltage source (V) through the switch and inductor to the load (right). When the switch is open, stored energy in the inductor continues to provide current to the load, through the diode. (Source: Cyril Buttay, CC BY-SA 2.5).

A switching power supply requires a complex control mechanism to switch on and off at the right time. The AGC used a technique called PWM (pulse-width modulation), where power is switched on and off at a fixed frequency (e.g. 20 kilohertz), but changing the fraction of the time the power is on to regulate the voltage.

The schematic below shows the AGC's power supply. (Don't worry about reading the details; click for a larger version.) The buck converter itself (outlined in the lower right) has the expected switching transistor, diode, inductor, and capacitors. However, the power supply has many more components to implement the PWM control circuitry.

Schematic of the AGC's power supply. The main signals are highlighted: 28-volt input (red), 4-volt output (orange), reference voltage (green), comparator output to control the PWM (purple), and PWM output (brown). (source)

To summarize the power supply's operation, 28 volts (red) is supplied at the upper left and filtered. The buck converter in the output circuit (right) reduces the voltage to 4 volts (orange) On the control side (left), the output voltage is used for feedback. A two-transistor comparator (lower left) compares the output voltage with a reference voltage (green) set by a Zener diode and resistor network. The output of the comparator (purple) goes through the PWM control circuit where it modifies the width of the pulses (brown) produced by the PWM circuit. These pulses drive the switching transistor in the buck converter, closing the feedback loop. The computer's clock signal providing timing for the PWM circuit.7

Astronauts interacted with the AGC through the Display/Keyboard (DSKY). The STBY button (lower right) put the computer in standby mode, which was indicated via the STBY light (left). Photo from Virtual AGC.

The power supply also included a standby circuit. By pressing the STBY key on the display/keyboard (DSKY), a relay would disconnect most of the computer's power. This reduced energy consumption when the computer wasn't needed.8

The diagram below shows the top of the power supply module with the major components labeled. Note the large size of the transistors, inductors and filter capacitors compared to the tightly-packed cordwood circuitry on the left. The switching transistor for the buck converter is almost an inch in diameter.

The major components of the AGC's power supply. The components for the buck converter are much larger than the control circuitry.

The transistors of the 1960s were barely able to support switching power supplies since they required a power transistor that could operate at both high speed and high current, which was difficult at the time. (Modern transistors (MOSFETs) are cheap and can handle much higher voltages, leading to ubiquitous low-cost phone and laptop chargers that run off an AC outlet.) The switching transistor required a high-current control signal, which was provided by three drive transistors (in a "complementary Darlington" configuration).

Closeup of transistors in the power supply. The large transistor on the right is the high-current switching transistor. Driving it required the three transistors on the left.

Testing the power supply

We extensively tested the AGC's components before powering up the system. For the power supply, we first checked all the tantalum capacitors since tantalum capacitors are prone to shorting out. We found that the capacitors were all in good shape with the proper capacitances. This is in contrast to modern capacitors, which often leak or fail after a few years. NASA used expensive aerospace-grade capacitors and X-rayed each one to test for faults, and this made a large difference.

Wiring up each power supply for testing (below) was more complex than you might expect. The AGC used two identical power supplies that supplied 4 or 14 volts. The output voltage was selected by backplane wiring that connected different resistors in the feedback resistor network. We reproduced these connections on a breadboard, as well as connecting up the input and output. Some high-wattage resistors (lower right) served as the load.

The setup we used to test the power supply. Connections were made to the pins on the bottom of the module. These pins connected the module to the rest of the AGC. In this view you can see the white wires on the side of the module that connected the circuitry on top of the module to the pins on the bottom.

We powered-up the AGC modules with 28 volts using a current-limited supply to limit potential damage from any faults. We took measurements and found that 4V power supply produced 4.09 volts while the 14V power supply produced 14.02 volts. The quality of the power was good, with about 30mV of ripple. We were somewhat surprised that both power supplies worked flawlessly after 50 years.

Conclusion

The Apollo Guidance Computer used advanced switching power supplies that were lightweight and efficient. While switching power supplies were exotic in the 1960s, improved semiconductors have made them cheap and ubiquitous. Now the switching transistor, a high-precision voltage reference, and the control logic can be combined on a single chip. The modern equivalent of the AGC's power supply is a tiny 5A buck converter for $1.50 on eBay (below). While I wouldn't trust this converter to get to the moon, let alone still work 50 years from now, it illustrates the dramatic improvements in switching power supply technology. (I've written more about the history of switching power supplies.)

A modern 5A buck converter is compact and costs $1.50.

To learn more about our AGC restoration, see Marc's series of AGC videos; the video below shows us testing the power supplies. I announce my latest blog posts on Twitter, so follow me @kenshirriff for future articles. I also have an RSS feed. Thanks to Mike Stewart for photos.

Notes and references

1. The AGC restoration team consists of Mike Stewart (creator of FPGA AGC), Carl Claunch, Marc Verdiell (CuriousMarc on YouTube) and myself. The AGC that we're restoring belongs to a private owner who picked it up at a scrapyard in the 1970s after NASA scrapped it. For simplicity, I refer to the AGC we're restoring as "our AGC". ↩

2. The first version of the Apollo Guidance Computer was known as Block I. The AGC was extensively redesigned to produce the Block II version that was flown. The Block I used +3V and +13V power supplies, while the Block II used +4V and +14V. The Block I power supply is documented here in section 4-8.7. The Block II power supply is documented here in section 4-5.9. ↩

3. The power systems were different between the command/service module and the lunar module. On the command/service module the 28 volts was fed to the different parts of the spacecraft using two buses (Main A and Main B) for redundancy. Main A bus was connected to the A31 power supply module, while the Main B bus was connected to the A30 power supply module (schematic). The two buses were tied together inside the AGC after passing through power rectifiers, so either bus could power the AGC.

   (You may recall from Apollo 13: "Houston, we've had a problem. We've had a Main B Bus undervolt". When the oxygen tank exploded, the voltage from the fuel cells dropped, triggering the low voltage alarm.)

   The lunar module used batteries for its 28 volt supply, rather than fuel cells. Instead of Main Bus A and Main Bus B, the lunar module had a Commander bus (CDR BUS) and a Lunar Module Pilot bus (LMP BUS). The AGC on the lunar module was only connected to the CDR BUS, so there wasn't redundancy. ↩

4. I estimated the wattage of the power supplies by looking at the current-limit feature. The power supplies have two 0.12Ω current-sense resistors. The voltage drop across these resistors will turn on transistor Q13, which will reduce the PWM output and thus the power supply's output voltage. The 4V power supply has the two resistors in parallel (connected by external wiring). Assuming the transistor turns on at 0.6V, this corresponds to a current of 0.6V / 0.06Ω = 10 A. The 14V power supply uses one current-sense resistor, so it will be limited to around 0.6V / 0.12Ω = 5A. ↩

5. Some calculations show the problem with using a linear power supply. The AGC's power supply produced 4 volts at 10 amps, which is 40 watts. A linear power supply would dissipate 24 volts (of the 28 volts) at 10 amps, i.e. 240 watts. The linear power supply would be 14% efficient, wasting 86% of the energy. When you need tanks of liquid hydrogen and oxygen to provide the energy, wasting 86% is unacceptable. In addition, disposing of waste heat on a spacecraft is difficult, so an additional 240 watts would be a problem. ↩

6. In the power supplies, the cordwood components are mounted differently from the other cordwood modules. Most AGC modules had components running from one side to the other as shown below, while components in the power supply went from top to bottom, parallel to the pins. This allowed the use of longer components, in particular, the large filter capacitors.

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   Most of the cordwood modules, such as this interface module, had components running from side-to-side through the module.

7. One interesting thing about the power supply is that the PWM circuit was driven by the computer's oscillator. But the oscillator was powered by the power supply, raising a chicken-and-egg problem of how the system started up. The solution was that the PWM circuit would self-oscillate at 20 kilohertz if there was no external clock signal, so it would still produce the correct output voltage. Once it provided power to the oscillator module and the oscillator produced a clock signal, the power supply synchronized to this clock signal (50 kilohertz for the 4V supply and 100 kilohertz for the 14V supply). ↩

8. The standby (STBY) key on the DSKY was changed to PRO (proceed) on later versions of the DSKY and the functionality was changed somewhat. ↩