Reverse-engineering the LM185 voltage reference chip and its bandgap reference

Many circuits, such as a computer power supply or a phone charger, require a stable voltage reference, but it's harder than you might expect to keep a voltage stable when the temperature changes. One integrated circuit that does this is the LM185.1 I looked at the die of this chip and found some interesting features. The same silicon die is used for three different integrated circuits, using tiny internal fuses to change its functionality. The chip uses a special circuit called the bandgap reference to keep the voltage stable even if the temperature changes. In this blog post, I'll discuss the circuitry of the LM185 and its implementation in silicon.

Composite die photo of the LM185. Click this (or any other) image for a larger version.

The photo above shows the LM185 die under the microscope, a tiny square of silicon. The underlying silicon is blue-gray, while the metal wiring on top is orangish. Regions of the silicon are doped with various impurities to form the transistors, resistors, and other devices on the chip. The variations in doping are visible as slight color changes in the silicon. At the top is the National Semiconductor logo.

The LM185 is available in three variants. The LM185-ADJ is the adjustable voltage reference. It has three pins: one is a feedback pin that controls the voltage. The LM185-1.2-N is a two-pin device, called a "micropower voltage reference diode". It is similar to a Zener diode providing 1.235V, but with better performance. (Lower power consumption, less noise, and better stability.) Finally, the LM185-2.5-N provides a 2.5V reference. The three variants are based on the same silicon die. The latter two have the feedback wired internally to provide a fixed voltage rather than an adjustable voltage.

The next sections describe how the various components of the chip are fabricated from silicon, and how they appear on the die.

NPN transistors

The photo below shows a closeup of one of the transistors in the LM185. The black lines and slightly different tints in the silicon indicate regions that have been doped to form N and P regions. The whitish areas are the metal layer of the chip on top of the silicon—these form the wires connected to the collector, emitter, and base.

Structure of an NPN transistor on the die. I edited the transistor layout so a cross-section would work.

Underneath the photo is a cross-section drawing illustrating how the transistor is constructed. There's a lot more than just the N-P-N sandwich you see in books, but if you look carefully at the vertical cross-section below the 'E', you can find the N-P-N that forms the transistor. The emitter (E) wire is connected to N+ silicon. Below that is a P layer connected to the base contact (B). And below that is an N+ layer connected (indirectly) to the collector (C).

The output transistor (below) is much larger than the other transistors and has a different structure in order to support the chip's high-current output. It has multiple interlocking "fingers" for the emitter and base, surrounded by the large collector.

A large, high-current NPN output transistor in the LM185 chip. The collector (C), base (B) and emitter (E) are labeled.

PNP transistors

You might expect PNP transistors to be similar to NPN transistors, just swapping the roles of N and P silicon. But for a variety of reasons, PNP transistors have an entirely different construction. They consist of a small circular emitter (P), surrounded by a ring-shaped base (N), which is surrounded by the collector (P). This forms a P-N-P sandwich horizontally (laterally), unlike the vertical structure of the NPN transistors.

The diagram below shows one of the PNP transistors in the LM185, along with a cross-section showing the silicon structure. Note that although the metal contact for the base is on the edge of the transistor, it is electrically connected through the N and N+ regions to its active ring in between the collector and emitter.

A PNP transistor in the LM185 chip. Connections for the collector (C), emitter (E) and base (B) are labeled, along with N and P doped silicon. The base forms a ring around the emitter, and the collector forms a ring around the base.

Resistors

Resistors are a key component of analog chips. Unfortunately, resistors in ICs are large and inaccurate; the resistances can vary by 50% from chip to chip. Thus, analog ICs are designed so only the ratio of resistors matters, not the absolute values, since the ratios remain nearly constant. The photo below shows two paralleled resistors. Other resistors have a zig-zag shape to fit a longer resistor into the available space.

A resistor inside the LM185 chip. The resistor is a strip of P silicon between two metal contacts.

Capacitors

A capacitor consists of a metal plate on top of silicon, separated by a thin oxide layer that acts as a dielectric. Capacitors are fairly large on integrated circuits; they are the most visible components on this die. The capacitor below contains multiple circular patterns. These may be doped silicon regions, where the junction between two regions provides additional capacitance.

A capacitor on the die.

Fuses

Fuses allow the circuitry of the chip to be changed after manufacturing. The LM185 uses fuses for two reasons. First, fuses can add or remove resistance, allowing the circuit to be tuned for higher performance. Second, a fuse changes the feedback circuitry between the LM185-1.2-N and LM185-2.5-N variants. (The LM185-ADJ version requires more changes than are supported by fuses, so it needs some changes to the metal layer. For instance, it has three pads connected instead of two.)

A fuse has two metal pads attached. Before the chip is packaged, probes can contact the pads and apply a high current to blow the fuse. The first type of fuse is implemented with a tiny strip of metal that is vaporized to break the circuit, just like a large-scale fuse. The second type of fuse is an "antifuse", which has the opposite behavior: it does not conduct until a high current is applied, at which point it becomes conductive. The antifuse can be built from a Zener diode, and the process of shorting it out is called a "Zener zap". The high current forms metal spikes through the junction, causing it to permanently conduct. The diagram below shows a fuse and an antifuse as they appear on the die.

A fuse and an antifuse on the die (I think). The contacts originally had more metal, but I used acid to clean gunk off the die and it dissolved some of the metal.

IC circuit: The current mirror

There are some subcircuits that are very common in analog ICs, but may seem mysterious at first. The current mirror is one of these. The idea is you start with one known current and then you can "clone" multiple copies of the current with a simple transistor circuit, the current mirror.

The following circuit shows how a current mirror is implemented with three identical transistors.2 A reference current passes through the transistor on the right. (In this case, the current is set by the resistor.) Since all the transistors have the same emitter voltage and base voltage, they source the same current, so the currents on the left match the reference current.

Current mirror circuit. The currents on the left copy the current on the right.

A common use of a current mirror is to replace resistors. As explained earlier, resistors inside ICs are both inconveniently large and inaccurate. It saves space to use a current mirror instead of multiple resistors whenever possible. Also, the currents produced by a current mirror are nearly identical, unlike the currents produced by two resistors.

Interactive chip explorer

To illustrate how the components form the chip, the die photo and schematic below are interactive. Click on a component in the die or schematic, and a brief explanation of the component will be displayed.

Click the die or schematic for details...

Because the three variants of the LM185 are slightly different, I had to combine three schematics to form the schematic above. Red components are only in the LM185-ADJ, green components are in the LM185-1.2-N, blue components are in the LM185-2.5-N, and cyan components are in the latter two chips. Note that the primary difference is the feedback circuit, but there are additional differences as well.

How a bandgap reference works

The main problem with producing a stable voltage from an IC is that the chip's parameters change as temperature changes. The bandgap voltage reference is commonly used to create a temperature-independent voltage reference.5 The trick is that it has one voltage that goes down with temperature and another than goes up with temperature. If you combine them correctly, you get a voltage that is stable with temperature.

To create a voltage that goes down with temperature, you can put a constant current through the transistor and look at the voltage between the base and emitter, called V_be. The graph below shows how this voltage drops as the temperature increases. At the left, the line hits the bandgap voltage of silicon, about 1.2 volts; this will be important later.

Vbe vs temperature for a transistor

If you set up a second transistor this way but with a lower current3, you get the same effect but the voltage V_be curve drops faster. This may not seem helpful since we need a voltage that goes up with temperature. But here's the trick: if you subtract the two V_be voltages, the difference increases as temperature increases, since the lines get farther apart. The difference is called ΔV_be. The graph below shows the V_be curves for two different transistors, and you can see how the difference ΔV_be between the curves increases with temperature, even though both curves decrease with temperature.

Voltages in a bandgap reference: Vbe for two transistors as temperature changes.

The final step to a bandgap reference is to combine V_be and ΔV_be in the right ratio so the result is constant with temperature. It turns out that if the values sum to the bandgap voltage of silicon (approximately 1.2 volts), the drop in V_be and the increase in ΔV_be cancel out. In the graph below, adding 10 copies of ΔV_be is the right ratio; the exact ratio depends on the particular transistors. The important thing to notice in the graph below is that as the temperature changes, V_be+nΔV_be remains constant - the top of the blue ΔV_be line remains at the bandgap voltage.

By adding multiples of ΔVbe to Vbe, the bandgap voltage is reached regardless of temperature.

In the LM185, the key transistors are Q10 and Q11, where Q10 has 10 emitters in parallel, so each has 1/10 the current. Thus, if you feed the same current into both transistors, Q10 has a lower V_be voltage than Q11 as described above. Note that Q10 is split in two: one half above Q11 and one half below Q11. This layout minimizes potential error due to a temperature gradient across the die. Half of Q10 will be hotter than Q11 and half will be cooler, so the difference will cancel out.

Transistors Q10 and Q11 are the key to the bandgap reference. Q10 has 10 emitters, so each has 1/10 the current as Q11.

The diagram below shows how the bandgap reference is implemented in the LM185. Transistors Q10 and Q11 have different V_be voltages due to their relative sizes. The difference in these voltages (ΔV_be) is developed across R7. Since the same current flows through R6, R7, and R8, the voltage across R6 will be 4ΔV_be and the voltage across R8 will be 6ΔV_be by Ohm's law. Thus, the combination of R6, R7, and R8 multiply ΔV_be by 11. Meanwhile, Q14 has its own V_be.

The bandgap circuit in the LM185.

Summing the voltages along the right gives V_be + 11ΔV_be, which is designed to match the temperature-stabilized bandgap voltage of 1.2 volts. Thus, the circuit will be balanced4 if the voltage between the feedback input and V+ is 1.2 volts. If the voltage is not 1.2 volts, Q10 and Q11 will pass different amounts of current. Since the current mirror (Q12 and Q13) attempts to feed the same current into Q10 and Q11, any discrepancy will appear as current at the error output. This error current is amplified and controls the output transistor, adjusting the voltage until the feedback voltage is brought back into compliance. Thus, the circuit maintains the desired voltage, stabilized even if the temperature changes.

Conclusion

Well, that turned into a longer blog post than I was expecting. Although the LM185 doesn't contain many components by modern standards, it provides a stable, regulated voltage reference. It has some interesting features such as the use of fuses both to improve performance and to sell variant chips. It also illustrates the principle of the bandgap voltage regulator.

I announce my latest blog posts on Twitter, so follow me @kenshirriff. I also have an RSS feed. Thanks to Mitch Wright for supplying the chip.

Notes and references

1. The LM185, LM285, and LM385 are the same chip, but with different temperature ranges. The LM185 is rated for the military temperature range: -55°C to 125°C. The LM285 is rated for the automotive temperature range: -40°C to 85°C. The LM385 is rated for the standard temperature range: 0°C to 70°C. I believe the chips are identical except for testing. For the purposes of this post, you can treat the three chips as identical. ↩

2. For more information about current mirrors, check Wikipedia or chapter 3 of Designing Analog Chips. ↩

3. When building a bandgap reference, what really matters for V_be is the current density through the transistors - the current divided by the area of the emitter. Decreasing the current through the transistor decreases the current density. The second way to decrease current density is to use a larger transistor with a larger emitter. Often five or ten identical transistors in parallel will be combined to form this large transistor to ensure the large transistor and the small transistor are exactly matched. ↩

4. One tricky thing about the bandgap circuit is that it is implemented "backward", taking the voltage as an input. The chip's block diagram6 shows that the reference generates 1.2 volts and this is compared to the input voltage. But in reality, the input voltage is fed into the bandgap circuit. If the input is 1.2 volts, the circuit is balanced. But if the input is too high or too low, the bandgap circuit will be unbalanced with more current through one transistor than the other. This "error" signal is amplified and used as feedback to adjust the input voltage until it matches 1.2 volts. In other words, there's no 1.2-volt reference inside the chip. Instead, the chip and its external input form a feedback loop that generates 1.2 volts. ↩

5. I've written before about bandgap references, specifically the 7805 voltage regulator and the TL431. ↩

6. The TL431 is a popular voltage reference, used in many power supplies. The main difference is that the LM185 regulates the voltage relative to the positive side, while the TL431 regulates the voltage relative to the negative side.

   

   Comparison of the LM185 and TL431 block diagrams, from the datasheets.

    ↩

Reverse-engineering a vintage power supply chip from die photos

I recently did a PC power supply teardown so I figured it would be interesting to go deeper and see what happens inside the power supply's control IC. The die photo below shows the UC3842 chip, which was very popular in older PC power supplies.1 (The chip was introduced in 1984 but this die has a date of 2000.) The tiny silicon die is patterned to create the transistors, resistors and capacitors that make up the circuit. The lighter-colored lines are the metal layer on top of the silicon, forming the chip's wiring. Around the edges, square pads provide the connections from the die to the IC's external pins; tiny bond wires connect the pads to the chip's external pins.

The UC3842 die. Around the outside, the pins are labeled. (Click this image, or any other, for a larger version.)

The photo below shows the chip mounted on the power supply board. For the die photos, I extracted the die from the epoxy package by heating it and then cleaned up the die with a few drops of sulfuric acid. I took photos with a microscope and stitched them together to create a high-resolution image.

The UC3842 chip mounted on the power supply's circuit board. The white glob is silicone, which held many of the power supply components in place.

The chip is from the PC power supply below. This is a switching power supply so it uses several steps to produce the output voltages. On the primary side, the input AC is filtered and then converted to high-voltage DC (roughly 170 to 340 volts) by the bridge rectifier, and the large capacitors smooth it out. Next, the DC is chopped into pulses thousands of times a second by the switching transistor. The control IC constantly adjusts the width of the pulses to regulate the output voltage. These pulses go into the transformer, which converts the high-voltage pulses into low-voltage, high-current. The diodes on the secondary side produce the multiple DC outputs, which are smoothed by the inductors and capacitors.

An ATX power supply with the main components labeled. I removed the heat sinks and capacitors to improve visibility.

This process may seem complex, but it has several advantages over putting the AC from the wall directly into a transformer. First, because the transformer operates at thousands of hertz instead of 60 hertz, a much smaller transformer can be used. Second, chopping the DC into pulses wastes very little energy, compared to a "linear regulator" that converts excess voltage into heat. The result is a power supply that is inexpensive, lightweight, and efficient.

In this blog post, I'll explain the construction of the controller IC, the building blocks of its circuitry, and how it operates. This may be a lot for one blog post, but we'll see how it goes.

Some silicon components

This IC is built from a type of transistor known as bipolar, rather than the MOS transistors that are typically used in modern ICs. The highly-magnified photo below shows an NPN transistor as it appears on the chip, with a cross-section drawing underneath. The metal wiring on top of the transistor is visible as the wide light-colored lines. Different regions of the silicon are doped with impurities to change its electrical properties, yielding N-type and P-type silicon. These regions are faintly visible in the photo. An oxide layer on top of the silicon provides insulation from the metal, except where a contact (black circle or oval) provides a connection between the metal and silicon.

Diagram illustrating the construction of an NPN transistor.

The chip also uses many PNP transistors. Although you might expect a PNP transistor to simply be the reverse of an NPN transistor, it has a different structure, with the regions arranged laterally instead of vertically. The collector and base form concentric square rings around the emitter. The base wire is not connected to the base region directly. Instead, the wire is at a distance, and the base signal travels underneath through the N layer.

Diagram illustrating the construction of a PNP transistor. The dotted lines represent how the collector and base surround the emitter.

Because this chip consists of mostly analog circuitry, it uses a lot of resistors. The photo below shows several typical resistors, the thin grayish-green lines. The resistors are connected to metal wires at either end, the wider metallic-looking traces. Some resistors are straight lines, while others zig-zag to fit a longer resistor (i.e. higher resistance) into the available space.

Resistors on the die.

Resistors are an inconvenient component for integrated circuits. First, they take up a relatively large amount of room, especially long, high-value resistors. Second, they are inaccurate; their value can vary unpredictably from chip to chip, or even on a single chip. For this reason, circuits are typically designed so they depend on the ratio between two resistors, which is much more stable.

Capacitors are also bulky so the chip uses only a few, to stabilize its amplifiers. A capacitor can be formed by using the underlying silicon as one plate, and then putting a layer of polysilicon on top to form the second plate, separated by a thin layer of insulating oxide. Polysilicon is a special type of silicon, and appears green in the photo.

A capacitor on the die.

Architecture of the chip

To summarize the chip, it generates pulses to control the switching transistor that feeds the transformer. These pulses are at a fixed frequency (e.g. 52 kHz), but the width of the pulses increases if more power is needed to keep the output voltage constant. The chip constantly adjusts the pulse width based on voltage and current feedback from the power supply, keeping the output voltages stable even as the load changes.

The UC3842 die. Main functional blocks of the die are labeled.

The die image above has been labeled with the main functional blocks of the chip. It can be compared with the block diagram (below) from the datasheet. I'll describe the main functional blocks before explaining how they are implemented.

Block diagram of the UC3842 chip with annotation. Original from the datasheet.

The power supply's pulses start with the chip's oscillator, which generates pulses at a frequency controlled by an external resistor and capacitor. Below the oscillator is the feedback circuitry that adjusts the pulse width based on voltage and current feedback. The PWM latch (Pulse Width Modulation) combines the oscillator signal and the feedback to generate pulses of the right duration. These pulses go to the high-current output stage, which drives the external switching transistor.

The chip itself is powered by an auxiliary winding on the transformer that provides 15 to 30 volts. The chip regulates this down to an internal 5-volt supply, using a special circuit called a bandgap regulator to keep this voltage stable within 2%, even with changing temperature. (This regulated reference voltage is also provided externally as Vref for external circuitry that needs a stable voltage.)

A potential problem is that if the power supply is unplugged (for example), the chip may behave unpredictably as the input voltage drops. To guard against this, an Under-Voltage Lock Out (UVLO) feature shuts the chip down cleanly if the input drops too low.

A final interesting feature of the chip is how it starts up. As described above, the chip is powered by the transformer, but the chip generates the pulses that feed the transformer. This seems like a chicken-and-egg problem, since the chip won't receive any power until it is already driving the transformer. The solution is a connection to the rectified line voltage through a very large resistor, so the chip receives hundreds of volts but just microamps of current. A Zener diode (below) drops this startup voltage down to 34 volts, enough for the chip to start generating pulses, at which point the transformer takes over.2

The Zener diode on the chip. It limits the startup voltage to 34 volts. It consists of five diodes in series.

The oscillator

The simplified diagram below shows how the oscillator works. In the first phase (A), the external capacitor is charged through the resistor. When the voltage on the capacitor reaches a fixed level, the comparator (triangle) turns on, energizing the discharge transistor. In the next phase (B), the capacitor discharges through an internal resistor, and then the cycle starts again.3 Thus, by choosing particular values for the external resistor and capacitor, the power supply designer can select the oscillator frequency.

This diagram shows how the oscillator is controlled by an external resistor and capacitor.

As mentioned earlier, resistors inside an IC are inaccurate. This poses a problem for the oscillator, since the discharge voltage level is set by resistors. The solution is to tune the resistances by putting fuses in parallel with small resistors and selectively blowing fuses to add the resistors to the circuit.4 Specifically, before the chip is packaged, its performance is measured. To blow a fuse, probes are pressed against the circular contacts and a large current is applied. The additional step of blowing fuses increases the manufacturing cost of the chip, but it provides more precise performance.

Fuses to adjust resistance.

The oscillator has a second set of fuses to tune the discharge resistance (below). These fuses use a different principle: they are "antifuses", which act like fuses in reverse. An antifuse starts off non-conducting, but passing a high current through it creates a conductive metal spike in the antifuse.5

The discharge circuitry of the oscillator. The antifuses adjust resistance in the oscillator.

Current mirrors

The current mirror is a fundamental building block in analog circuits. This chip, like many analog chips, needs small, steady currents to drive amplifiers, bias circuits, pull signals up, and perform other tasks. Rather than using separate resistors to generate each current, a common solution is the current mirror: you control one current with resistors, and then use transistors to make copies of this current. The schematic below shows a simple current mirror where the fixed current through the transistor on the left is mirrored into three identical copies.

A basic current mirror circuit. The current on the left is mirrored into three current sinks.

The diagram above shows the main current mirrors for the chip. The large resistor in the lower-right controls the current through the main transistor, and the other transistors copy this current.6 Small emitter resistors improve the performance.

The current-mirror circuitry on the die.

The feedback or error amplifier

Next, I'll look at the voltage feedback circuit, which lets the chip know if the output voltage is too high or too low. The chip receives the output voltage, scaled to form a feedback signal. The error amplifier compares the feedback to a reference voltage to determine if the voltage is too high or too low.

The error amplifier is based on a differential amplifier, which amplifies the difference between its two inputs. This circuit is common in analog circuits, forming the heart of an op-amp or a comparator. The basic idea is that a current mirror (the circle at the top) generates a fixed current I. This current gets split between the left path (I1) and the right path (I2). If the transistor on the left has a higher input voltage than the transistor on the right, most of the current will go to the left. But if the transistor on the right has a higher input, most of the current will go to the right. This circuit amplifies the voltage difference: even a small difference between the two inputs will switch most of the current from one side to the other.

A differential pair amplifies the difference between the two inputs.

The error amplifier extends this circuit with about a dozen transistors in total. These transistors add buffering to the inputs, control various currents, and provide a second amplification stage. The photo below shows the key components of the error amplifier. The green capacitor on the right stabilizes the amplifier.

The error feedback amplifier as it appears on the die with key components indicated.

The current comparator

The power supply uses voltage feedback to adjust the pulse width, but it also monitors the current through the transformer so the power supply can respond faster to changes in the load. The current feedback is implemented by the "current sense comparator". This is similar to the feedback amplifier, amplifying the difference between the inputs. (Since it is a comparator, not an amplifier, it is designed to output a binary signal instead of an analog level, but the basic principle is the same.) The diagram below shows the key circuitry for the current comparator on the die and how it relates to the block diagram. The output from the error amplifier goes through some circuitry to adjust the voltage levels before entering the comparator.7

How the current sense circuit maps onto the die components.

Under-voltage lockout

Another interesting circuit is the under-voltage lockout (UVLO), in the upper-left of the die. The purpose of this circuit is to shut down the chip cleanly if the input voltage falls too low. (This could happen if there is a power failure or even from unplugging the power supply.)

The heart of the UVLO circuit is a bandgap regulator, which provides a voltage reference that will be stable even if the temperature changes. This is surprisingly difficult in an integrated circuit, since the properties of transistors change with temperature. The bandgap regulator uses two transistors of different sizes so they are affected by temperature differently. In the die photo below, Q2 is six times the size of Q1.

The bandgap circuit for the under-voltage lockout.

The schematic below shows how the bandgap regulator is constructed. The key factor is the voltage between a transistor's base and its emitter (V_be), which decreases with temperature. However, ΔV_be, the difference between the two V_be increases with temperature. With the right resistors, these two factors cancel out, yielding a stable reference voltage. The circuit compares the input voltage to this reference voltage; see the footnote8 for more details.

Schematic of the bandgap regulator. A current mirror directs the same current through both sides of the circuit.

In the UVLO circuit, the bandgap reference is used to detect if the chip's input voltage falls too low. Since the input voltage is around 30 volts, a network of resistors (below) scales it to the bandgap voltage (about 1.2 volts) for comparison.9

This set of resistors forms voltage dividers to reduce the input voltage for the bandgap comparator. Note the mask date of "00" as well as the ST Microelectronics logo at the bottom.

The bandgap voltage reference

The chip uses a second bandgap reference to create an internally-regulated 5 volt supply to power the chip's circuitry. This voltage is also made available to external circuitry that may need an accurate voltage.

At a high level, this voltage reference is a linear power supply, with a power transistor controlling how much of the input voltage passes through to the regulated Vref. The control signal comes from the bandgap regulator, which I'll explain below. The output circuit also has a current-sense resistor to measure the output current. This limits the output current to 50 mA in case of a short circuit. A diode clamps the output if the input voltage suddenly drops.

Schematic of the Vref output circuit. The transistor limits the voltage.

The photo below shows how this circuit is implemented on the die. The power transistor is much larger than the other transistors, so it can support a high-current output. The construction of the diode is similar to the power transistor, but without a collector. The current-sense resistor is short and wide, giving it a low resistance.

Vref output circuit on the die.

The heart of the circuit is the bandgap voltage reference below. The circuit is similar to the bandgap voltage reference for the under-voltage lockout circuit, using two transistors, one with six times the area of the other. However, the six-way transistor has been split into two and surrounds the single transistor. With this layout, even if there is a temperature gradient across the die, the single-transistor and the six-transistor will be at the same average temperature.

The transistors at the heart of the bandgap reference.

The accuracy of the bandgap regulator depends on the accuracy of its resistors. During manufacturing, fuses are blown to tune the resistance, as with the oscillator's resistors. The photo below also shows the resistors that form a voltage divider to reduce the 5-volt output to the 1.2-volt bandgap voltage. In contrast to the thin meandering resistors used elsewhere, these resistors are thick and uniform length to improve their accuracy.

Resistors that control the bandgap reference.

Output

At this point, I'll step back and review the chip's function in the power supply. It controls the switching transistor, causing the transistor to send high-voltage pulses through the transformer. The chip does this by producing control pulses on its output pin. Since the switching transistor is fairly large, the chip outputs a relatively high current (200 milliamps) control signal. This requires fairly large output transistors inside the IC.

The controller chip directs the switching transistor to send pulses through the transformer.

The die photo below shows the IC's two output transistors: the upper one pulls the output high, and the lower one pulls the output to ground. One interesting feature of the chip is that it has two pads on the die for Vin and two pads for ground. The purpose of this is that the output transistors draw a lot of current, which could cause noise fluctuations on the power and ground lines, interfering with the rest of the chip. By providing separate pads, the output transistor is somewhat isolated from the rest of the circuitry.10

Two large transistors drive the output pin.

Variants

One interesting thing about this chip is that four different chips are manufactured from the same silicon. The UC3842 has a 16-volt UVLO threshold, while the UC3843 has an 8.5-volt threshold for lower-voltage applications. Other variants of the chip (UC3844 and UC3845) have a flip flop to reduce the pulse duty cycle. These different chips use slightly different metal wiring over the same silicon base. (It's easier to customize the metal layer than the silicon.) The photo below shows some places where the metal wiring has been severed in the UC3842 to change the wiring.

Closeup of the die with some broken connections indicated with arrows.

Conclusion

Power supplies are usually taken for granted, but they contain a lot of interesting technology. The invention of the power supply control chip in 1975 is a key step in the history of power supply improvements. Modern power supply chips are much more complex, with features to improve efficiency and reduce interference, but the chip that I examined uses the same basic principles.11 Analog chips are built from several important building blocks such as differential amplifiers, current sources, current mirrors, and bandgap voltage references. The UC3842 chip illustrates all of these building blocks, and how they are combined to build complex circuits.

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Notes and references

1. For schematics of power supplies using this UC3842 chip, see this site, near the bottom of the page. ↩

2. The idea of a Zener diode is that it blocks current like a normal diode until it reaches the "breakdown voltage", where it starts conducting. Zener diodes are often formed on chips from the emitter-base junction of NPN transistors, which commonly results in a 6.8-volt breakdown voltage. Looking at the photo, you can see 5 transistor-like structures in series. At 6.8 volts each, this generates the 34-volt breakdown voltage shown in the block diagram. ↩

3. The oscillator's comparator is set to turn off about 1.6 volts below the level at which it turns on, that is it has hysteresis. This ensures that the capacitor discharges significantly rather than settling around the discharge level. The oscillator design is a bit like the 555 timer, with discharge and charge phases triggered by the capacitor voltage. ↩

4. Many of the resistors in the fuse network are made of fixed-length resistors in various combinations. For example, two in parallel gives twice the resistance, while two in series give half the resistance. The advantage of combining fixed-length resistors is that the resistances are more predictable than making resistors of different lengths. The different resistors have roughly binary values, so different combinations of blown fuses select a variety of resistances. ↩

5. I think that the chip uses Zener antifuses, since they look similar to NPN transistors without a collector. The process of blowing the antifuse to make it conductive is called a "Zener zap." ↩

6. The current mirror uses a buffered-feedback design with emitter degeneration resistors (details). The small emitter resistors improve the output impedance. Three of the transistors in the current mirror are set up to split current, so each sinks one-third of the regular current. Another transistor has a larger emitter resistor, reducing the current; a small change in resistance yields a large change in the current. This illustrates the flexibility of a current mirror to produce different currents. ↩

7. The block diagram shows a resistor-diode network between the error amplifier and the current sense comparator. This network scales and clips the error amplifier output to make its levels more useful. The circuitry isn't particularly interesting, so I won't discuss it in detail. I'll mention, though, that the block diagram shows the error amplifier output uses two diodes to drop its voltage. The circuit, on the other hand, raises the other signals by two diode levels instead, which works out the same mathematically. (Transistors are used to implement the diode drops as well as the 1-volt Zener.) ↩

8. The details of a bandgap reference are too complex to explain here, but I'll give a brief overview in this footnote. The basis is that the voltage between a transistor's base and emitter scales drops linearly with the temperature (in Kelvin). But since the two transistors have different areas, the two transistors have different scale factors. The difference between the two transistors' base-emitter voltages increases linearly with temperature. By combining a voltage that decreases linearly with temperature and a voltage that increases linearly with temperature, you can create a voltage that remains almost constant with temperature. This voltage turns out to be the bandgap voltage of silicon, about 1.2 volts.

   Scaling and combining these voltages is done by two resistors, so it is important that temperature doesn't affect the resistances. The circuit is designed so that only the ratio between resistances matters, so if temperature affects both resistors equally, the circuit is unaffected. A problem is that a temperature gradient on the chip could affect some resistors more than others, but the chip uses a clever layout technique to avoid this. There are seven resistor segments: one forms a resistor and six are in series to form a resistor with six times the resistance. The one-unit resistor is put in the middle with three segments above and three segments below. If a temperature gradient, for instance, increases the upper resistances, the resistor in the middle will have an "average" increase, while the 6-unit resistor will have three resistor segments with a large increase and three with a small increase, which will cancel out.

   The bandgap circuit doesn't explicitly generate a 1.2-volt output. Instead, it implicitly compares the input voltage with 1.2 volts. The circuit is set up so a 1.2-volt input balances the currents through both transistors. If the voltage increases, the single transistor passes more current than the six-unit transistor. A current mirror forces each side of the circuit to have the same current, with the result that the "extra" current flows through the output. Thus, if the input voltage is high enough, the circuit produces an output current, activating the chip. But if the input voltage is too low, the circuit doesn't produce an output current, shutting down the chip.

   For more information, see the optimistically-titled How to make a bandgap voltage reference in one easy lesson. ↩

9. Another feature of the under-voltage lockout circuit is hysteresis; it has a higher voltage to turn on than to shut off. The purpose of this is to make sure the power supply doesn't oscillate on and off if the input voltage is near the threshold. Hysteresis is implemented through the input voltage divider, which uses three resistors. If the chip is activated, a transistor feeds the supply voltage into the second resistor, increasing the divider's output voltage. The result is that once the chip is active, the supply voltage must drop more to turn the chip off. ↩

10. Surprisingly, the chip has two pads for power and two pads for ground, but only single power and ground pins. Instead, two bond wires go from the pads to each external power and ground pin. Although this doesn't provide complete separation between the chip's power and the output circuit's power, it is still beneficial since the bond wires are thicker than the metal traces and have lower resistance.

    Although this IC is usually packaged in an 8-pin package, some manufacturers, such as Fairchild, make versions of the UC3842 in 14-pin packages. The extra pins allow separate pins to be used for the circuitry and output power and grounds. ↩

11. While the UC3842 chip was introduced in 1984, the one I examined has a mask date of "00", so this design is from 2000. The power supply itself was from 2005. ↩

Inside a transistorized shift register box, built in 1965 for Apollo testing

One of the under-appreciated aspects of the Apollo launches to the Moon is how much testing was required. I recently came across an item that was part of this testing: the Computer Buffer Unit. It is essentially a 16-bit shift register that interfaced test equipment to the Apollo Guidance Computer. While a shift register is a trivial circuit nowadays, back then it took a box full of transistors that weighed about 5 pounds. In this blog post, I look inside this unit, describe its unusual packaging and circuitry, and explain how it works.

The Computer Buffer Unit is a 4"×6"×6" box. The three electrical connectors on the left are covered by protective covers. It has a humidity indicator and pressurization valve at the bottom.

Testing for the Apollo missions

The Apollo spacecraft required extensive testing even while it was sitting on the launch pad. Thousands of different spacecraft components needed to be activated and analyzed for various tests. Since the control room was miles away from the launch pad, it wasn't practical to run separate wires to each component. Instead, NASA invented (and patented) a complex digital test system that communicated efficiently between the control room and the rocket. This test system sent digital commands to the launch site, where racks of control and interface units were wired to the spacecraft components. These units decoded the commands and performed the specified operation. Massive quantities of measurement data from the spacecraft were encoded digitally and serialized for communication back to the control room.

The complexity of testing is illustrated by the control room below.2 This is not Mission Control, but a separate control room specifically for testing, called ACE-S/C (Acceptance Checkout Equipment-Spacecraft). These consoles were crammed with control switches, tape readers, CRT displays, chart recorders, and status panels for conducting tests and recording results. The ACE-S/C system supported manual, semiautomatic, and automatic testing, driven by two minicomputers1.

ACE control room. From Applicability of Apollo Checkout Equipment.

All parts of the spacecraft were tested, including the fuel cells, cryogenic fuel storage, communications, and environmental control. For this blog post, the relevant subsystem is "Guidance and Navigation", responsible for determining the Apollo spacecraft's position in space using inertial navigation and guiding it on the proper trajectory including the landing on the Moon's surface. The key to Guidance and Navigation was the Apollo Guidance Computer, 70-pound computers onboard the Lunar Module and the Command Module.

The Apollo Guidance Computer that we restored, next to a replica DSKY.

In space, astronauts operated the Apollo Guidance Computer through the Display/Keyboard (DSKY), a box (above) with keys, indicator lights, and numeric displays. But for ground testing, there needed to be a way to feed commands into the Apollo Guidance Computer from the testing system. The solution was the Computer Buffer Unit, the box that I'm examining. To operate the Apollo Guidance Computer remotely, the ACE test system encoded each DSKY keypress as a 16-bit command3 and sent it to the Buffer Unit. The Buffer Unit converted the message to serial, transferring one bit at a time to the Apollo Guidance Computer, which then processed the desired keypress.4 Thus, the Apollo Guidance Computer could be controlled remotely for testing, providing control over the Guidance and Navigation system, and the Computer Buffer Unit was the interface with the Apollo Guidance Computer.

Inside the Computer Buffer Unit

Next, I'll discuss the physical construction of the Computer Buffer Unit. Removing the lid reveals the components inside.5 The main circuitry consists of six horizontal circuit boards wired into a vertical backplane board; the top board is visible below. One unusual feature is the bag of desiccant inside the unit, zip-tied to the right side of the case. The designers of the unit were worried about Florida humidity and the risk of corrosion.6 To guard against damp air, the unit has a valve on the front so it can be pressurized with dry nitrogen. On the front of the unit, you can see a humidity sensor that changes color to indicate 10%, 20%, and 30% humidity. If the internal humidity exceeded 30%, the desiccant needed to be replaced, as described by the warning label.

The Buffer Unit with the lid removed.

I removed the circuit boards with some difficulty, as they fit tightly. The photo below shows the stack of six printed circuit boards wired into the vertical backplane. The wires from the connectors are soldered directly to the backplane.

With the circuit boards pulled out of the unit, the wiring to the backplane is visible.

The circuit boards can be opened up like a book to provide access to the inner boards. The boards are not soldered directly to the backplane, but are connected by short, flexible wires, allowing them to swing apart. To prevent short circuits between the boards, they are separated by white sheets of (probably) silicone.

After removing six screws, the boards can be unfolded like a book.

The circuitry is constructed in a very unusual way that I haven't seen before. Instead of mounting components directly on the circuit boards, components are mounted on small boards, each forming a module with a logic gate or two. These smaller modules are then soldered on pins above the main circuit boards, forming two-layer boards. Essentially they built pseudo-integrated-circuits on small boards, and then constructed the circuitry from these modules.

Closeup of logic modules mounted on the circuit board. A blue resistor is visible on the underside of the module.

It is difficult to see the components sandwiched between the main board and the smaller modules, but the side view below shows some of the components. The two boards are connected by the vertical pins. A tiny glass diode is visible towards the left. The longer components are resistors. The shiny metal-can transistors are in the middle of the module and harder to see.

This side view shows a latch module (bottom) attached to the circuit board (top). The diodes, resistors, and transistors of the latch module are visible.

One question is why the circuitry is implemented with small circuit boards attached to the larger circuit board, instead of mounting the components directly on the circuit board. This approach seems overly complex and makes the boards twice as thick. One advantage, though, is that the separate logic modules could be manufactured, testing, and repaired separately, important in an era when semiconductors were less reliable. Second, the main boards and the logic modules are different types of printed circuit boards: four-layer circuit boards with widely-spaced traces versus single-sided but dense boards.

Logic gates

The circuitry is implemented with a logic family called Diode-Transistor Logic (DTL). This type of logic was used in the early 1960s as it only required one (expensive) transistor per gate, using cheaper diodes where possible. As transistor prices dropped, Transistor-Transistor Logic (TTL) became more popular because of its better performance. Nowadays fast, low-power CMOS logic is used in most integrated circuits.

I reverse-engineered the schematic below, which shows a NOR gate from this unit. This gate has two inputs, as well as two outputs (for reasons that will be explained below). If both inputs are low (0), the transistor will be turned off. As a result, the resistors pull the outputs high, producing 1 outputs.

The NOR gate with both inputs low, outputs high.

If an input is high, the circuit behaves as shown below. Current flows from the input pull-up resistor through the diodes and the transistor's base, turning the transistor on. As a result, current flows from the outputs, through the transistor to ground, pulling the outputs low. Thus, the circuit implements a NOR gate: the output is 1 if all inputs are low, and 0 otherwise.

The NOR gate with a high input, outputs high.

The reason for multiple outputs is clever. If you connect the outputs from multiple gates together, this combined output will be pulled low if any output is low (i.e. the transistor is turned on), and otherwise will be pulled high by the resistor.7 This logic is equivalent to an AND gate. Note that the AND gate is implemented "for free" by wiring outputs together, without requiring additional logic; this is called wired-AND. However, you can't use a gate's output in two different wired-AND gates, since everything will be shorted together. Instead, a gate provides multiple outputs that can be wired independently; the diodes keep the outputs isolated from each other.

The board I examined has 5 different types of logic module8, from an inverter with 1 input and 8 outputs to a module with two 2-input, 5-output NOR gates. These modules follow the circuit above, but with different numbers of inputs and outputs.

Implementation of the shift register

The idea behind a shift register is to store multiple bits in a row. Each time a clock signal is activated, the bits are shifted by one position. Shift registers can be used to store data, convert parallel data to serial, or convert serial data to parallel. In this Buffer Unit, the shift register converted a 16-bit parallel value from the test equipment into a serial stream of bits for the Apollo Guidance Computer.9

The board implements four bits of the 16-bit shift register. The schematic below shows the circuitry for a one-bit stage of the shift register. There's a lot going on, but I'll try to explain it. The heart of the stage consists of two latches, which store one bit. A bit is stored by first updating the primary latch, and then the secondary latch. (Each latch consists of two cross-coupled NOR gates, and can hold either a 0 or a 1.) The shift out lines are the outputs from the shift register stage, a regular output and an inverted output.

One stage of the shift register. It can read the bits in parallel, or shift a bit from one stage to the next.

Each shift out line is fed to the shift in lines of the next stage, allowing the bits to be transferred from stage to stage through the shift register. The shift and load control lines, along with the AND gates, select the input to each stage. With shift high, the input will be the shift out from the previous stage. With load high, the input reads the external bit in lines. This allows a 16-bit data word to be read into the shift register in parallel. (I'm not sure what the clear bit function is used for.) After a bit has been loaded into the primary latch, the clock line is activated to load the bit into the secondary latch, completing the shift or load cycle.

An interesting function of the unit is that after loading, the value in the latch is compared to the input value, to make sure that the circuit is operating correctly. If there is a mismatch, a compare AND gate will activate, clearing the match line. (A compare AND gate will activate if the input bit is 1 and the latch bit is 0, or vice versa.) This circuit also detects a fault in the bit input wires. Each bit is provided over two wires: one with the bit value and one with the inverted bit value. If a wire is broken or affected by noise, the comparison will fail.10

This diagram shows the functions of the gates. Note that the circular golden transistors are faintly visible through the circuit boards.

The board above11 contains four of these shift-register stages. The photo above shows how these stages map onto the hardware. The external signals (4 pairs of bit lines) enter at the bottom of the board, and pass through the input inverters. The 8 primary latch NOR gates implement four primary latches. Four secondary latch modules implement the four secondary latches, since each module contains two NOR gates. The clock driver, load driver, and shift driver provide 8 copies of the clock, load, and shift signals for the circuitry. Finally, the two match NOR gates combine the 8 match signals. (Note that since the AND gates are implemented with wired-AND, they don't use additional circuitry and do not appear in this diagram.)

I/O and power

I'll wrap up with a few comments on the I/O and power supply for the Buffer Unit. The unit has three military-style connectors on the front. At the top is a 61-pin connector for receiving the parallel data and control signals from ground equipment. (The pin count is larger than you might expect because each bit uses two wires as discussed earlier. Also, many of the 61 pins are unused.)

The unit has three connectors. The unit receives parallel data from ground equipment through the 61-pin connector at the top. The middle connector communicates the serial data to the Apollo Guidance Computer. The unit is powered with 28 volts through the bottom connector, which has larger pins for the high-current supply.

The middle connector has four pins that provide the serial data stream to the Apollo Guidance Computer. The wiring is a bit unusual. Instead of transmitting data over one serial line, the unit uses two pairs of lines: one to transmit "0" bits and one to transmit "1" bits. To provide electrical isolation between the unit and the Apollo Guidance Computer, these signals are transmitted via two small pulse transformers, shown below. When a pulse is fed into a pulse transformer, a similar pulse is produced on the output. (In modern equipment, an optoisolator provides similar functionality.)

Two pulse transformers on the top circuit board. Each small transformer is about 1 cm in diameter.

The bottom connector on the unit has two thick pins to provide 28 volts to the unit. This view inside the unit shows the power converter, a sealed black box. I believe this is a switching power supply module that converted the 28-volt input into the lower voltage required by the logic circuitry. It also provided electrical isolation from the power supply. The smaller black box on the right is an EMI filter on the power input; the Apollo ground test equipment encountered faults from voltage transients and electrical noise, so they added filtering.

The power supply components are sealed in black plastic.

Conclusion

This Computer Buffer Unit was built in 1965, a time when the industry was shifting from transistors to integrated circuits. This may explain the Unit's unusual construction technique, small circuit-board modules that are like integrated circuits built from discrete components.12 Interestingly, Motorola built a similar Buffer Unit for NASA that used integrated circuits (but was just as large),13 illustrating that transistors and integrated circuits were both viable approaches in 1965.

This box also illustrates the rapid pace of integrated circuit technology since the 1960s. The first commercial MOS integrated circuit was a 20-bit shift register introduced in 1964 and by 1970, Intel was producing a 512-bit shift register. In 1971, Western Digital was selling a UART chip, putting a complete parallel-to-serial and serial-to-parallel communication system onto a chip. Thus, it took 6 years to shrink the complex shift-register box down to a single chip (more or less). Nowadays, this functionality forms a tiny part of a complex chip. Coincidentally, Moore's Law, describing the exponential growth of integrated circuits, was published in 1965, the same year this box was manufactured.

I announce my latest blog posts on Twitter, so follow me @kenshirriff. (The Twitter thread corresponding to this blog post is here.) I also have an RSS feed. Thanks to Steve Jurvetson for letting me examine this artifact. A video tour of his space museum is here. Thanks to Mike Stewart for providing documents and extensive information on this box.

Notes and references

1. The photo below shows the ACE computer room that supported ACE testing. The system was controlled by two 13-bit CDC 160-G minicomputers. Strangely, the CDC 160-G minicomputers were 13-bit computers, with 13-bit addresses, 13-bit registers, and 13-bit arithmetic. The earlier CDC 160 computer was 12 bits, and CDC improved the 160-G model by adding one more bit. The CDC 160 was designed by Seymour Cray, reportedly over a weekend.

   

   "An ACE Station with twin Control Data computers." From Computers in Spaceflight.

    ↩

2. There were about 10 ACE installations for testing at various sites. ACE testing was performed at contractor sites, as well as at the launch pad. ↩

3. To send a DSKY keypress through the testing system, each keypress was encoded as 5 bits as shown below. The 16-bit message consisted of a 1 bit followed by three copies of the 5-bit keypress, with the middle copy inverted. (Sending the keypress in triplicate detected communication errors.)

   

   The encoding of keys when communicating with the Apollo Guidance Computer. From ACE-S/C Operator's Manual.

    ↩

4. The serial protocol used by the Apollo Guidance Computer is a bit unusual compared to modern serial protocols. Instead of a single serial line, it used two pairs of wires: one to receive a 1 bit and one to receive a 0 bit. This worked well with the Apollo Guidance Computer hardware, which included a feature for incrementing and decrementing counters in response to interrupts. In particular, a serial input 0 triggers a SHINC instruction (shift left), while a serial input 1 triggers a SHANC (shift and increment by 1) instruction.

   (The interrupt-triggered counter mechanism worked well except during the Apollo 11 landing, when the power supply for the Apollo Guidance Computer and the power supply for the rendezvous radar had a phase difference. For complex reasons, this resulted in a high rate of interrupts, overloading the Apollo Guidance Computer and causing restarts. This was indicated by the famous 1201 and 1202 program alarms during the landing.)

   

   The K-START (Keyboard - Selections To Actuate Random Testing) panel is used to send commands to the Apollo Guidance Computer. From ACE-S/C Operator's Manual.

   In the ACE testing control room, DSKY keypresses were entered on a panel called K-START (Keyboard - Selections To Actuate Random Testing), shown above. The keyboard corresponds to the keyboard on the DSKY, while it has other switches specific to testing. These key entries could also be recorded on perforated tape and played back at high speed. ↩

5. Another interesting feature of the unit is how it is mounted on a rack. The back of the unit has two Teflon-lined holes. Two "dagger pins" from the rack fit into these holes. On the front, the unit has two small hold-down hooks; a knob on the rack engages with the hook to hold the unit in place. The mounting hooks are type NAS 622, an aerospace standard. The hold-down mechanism is described here.

   

   Back of the Buffer Unit with identifying label and two holes for dagger pins. The labels say "Unit, Computer Buffer Guidance & Navigation. NAA/S & ID Control No. ME901-0271-0002. Stock No. Contract No. M5H3XA-450001. NAA/S & ID Inspection Serial No. Control Data Corporation MFGR Part No. 106068-0002. Mfgr Serial No. 10136SA08185. US Nov 19 1965.

    ↩

6. The document Acceptance Checkout Equipment for the Apollo Spacecraft discusses the corrosion problems encountered by the test equipment due to humidity and insufficient air conditioning. The specifications don't discuss pressurization of the unit, but I'm assuming they used nitrogen based on other items I've studied. ↩

7. One subtlety with the wired-AND gate is that connecting multiple outputs together will result in multiple pull-up resistors in parallel, which may provide too much pull-up current. The solution is that some gates have outputs without pull-up resistors, so each wired-AND output has a single pull-up. The wired-AND isn't entirely free, since the multiple outputs require multiple diodes, but diodes are inexpensive compared to transistors. I should admit that I'm not 100% sure of the circuitry. Since the components are all hidden underneath the module, I had to deduce the circuitry by probing it from above. There were a few inputs that didn't seem to have connectivity; perhaps there are capacitors to make these inputs pulse-based. ↩

8. The board I examined uses the following types of modules:
   2304: 1-in, 8-out inverter
   2309: 3-in, 4 out NOR
   2311: 4-in, 2-out NOR
   2319: 1-in, 4-out inverter
   2314: dual 2-in, 5-out NOR (larger than the other modules) ↩

9. The specifications for the Buffer Unit describe its purpose: "This specification covers the requirements for a Guidance and Navigation Computer Buffer Unit, hereinafter referred to as the G&N buffer. The G&N buffer shall form a part of the Digital Test Command System (DTCS) which is the up-link portion of the Automatic Checkout Equipment (ACE). The ACE will be used as ground support equipment for the Apollo space craft. The G&N buffer shall receive remotely generated digital test commands from the control room via the DTCS and shall store, verify, and shift out G&N data in appropriate format to the G&N on-board computer."

   

   Functional diagram of the Buffer Unit. Image from Specification MC 901-0666 courtesy of Mike Stewart.

   The specifications for the Computer Buffer Unit can be viewed online: MC901-0666, ME901-0666, ME901-0271, ME476-0070.

   The unit includes more functionality than just a shift register (but not much more). As shown in the functional diagram above, the unit also includes the clock oscillator that controls the timing of the serial pulses. Second, it contains a control circuit to handle loading the bits in parallel and then shifting them out serially. Third, for reliability reasons, it has a comparator circuit to check that the bits loaded into the shift register match the input bits. ↩

10. Modern systems often use differential signaling, using two complementary signals for a bit. Looking at the difference between the two signals provides noise immunity, since electrical noise will often affect both signals equally, and thus will be canceled out. Although the Buffer Unit uses two complementary signals, it doesn't provide this noise immunity, since the two signals are processed independently rather than differentially. ↩

11. I only reverse-engineered one of the boards, since I didn't want to risk more disassembly, and one board is enough to understand the basic logic. I studied board 6 of the unit, which implements bits 15 through 18 of the shift register. Board 3 implements bits 3-6, board 4 implements bits 7-10, as well as mode bits 1 and 2, board 5 implements bits 11 through 14, and board 6 (the one I examined) implements bits 15 through 18. Boards 2 and 4 implement control logic, while board 1 has the output driver transformers.

    

    With board 6 folded down, board 5 is visible.

    The photo above shows board 5. Note that the circuit layout is entirely different from board 6. I thought that the unit might consist of four identical 4-bit shift register boards, but it turns out that the boards are optimized for particular roles. ↩

12. In the context of "not-quite-integrated circuits", I should mention IBM's use of hybrid modules (called SLT) for the System/360 mainframes. These small aluminum-cased modules contained a few transistor or diodes as silicon dies, mounted on a ceramic substrate along with thick-film resistors. These modules were not quite integrated circuits, since they were built from discrete (but unpackaged) components. But they were closer to integrated circuits than the modules in the Buffer Unit, which used packaged transistors, resistors, and diodes on a printed circuit board. ↩

13. Motorola made a similar Buffer Unit, but they used integrated circuits, specifically Motorola's line of high-speed ECL chips, introduced in 1962. Since each chip is a few gates, it still took multiple boards to build the unit. Apollo Guidance Computer expert Mike Stewart has photos of the Motorola box here, as well as reverse-engineered schematics. The functionality of the Motorola box is nearly identical, except it has separate inputs for the 16-bit compare value. It is built with chips such as the MC308 flip flop and MC 309 dual NOR gate, described here.

    

    A board from the Motorola version of the Buffer Unit. Each metal can is an integrated circuit. Photo courtesy of Mike Stewart.

     ↩