Reverse-engineering the Yamaha DX7 synthesizer's sound chip from die photos

The Yamaha DX7 digital synthesizer was released in 1983 and became "one of the most important advances in the history of modern popular music"1. It defined the sound of 1980s pop music, used by bands from A-ha and Michael Jackson to Dolly Parton and Whitney Houston. The DX7's electric piano sound can be heard in over 40% of 1986's top hits.2 Compared to earlier synthesizers, the DX7 was compact, inexpensive, easy to use, and provided a new soundscape.3

While digital synthesis is straightforward nowadays, microprocessors4 weren't fast enough to do this in the early 1980s. Instead, the DX7 used two custom chips: the YM21290 EGS "envelope" chip generated frequency and envelope data, which it fed to the YM212805 OPS "operator" chip that generated the sound waveforms. In this blog post, I investigate the operator chip and how it digitally produced sounds using a technique called FM synthesis.6 21

I created the high-resolution die photo below by compositing over a hundred microscope photos.6 Around the edges, you can see the 64 bond wires attached to pads; these connect the silicon die to the chip's 64 pins. The chip has one layer of metal, visible as the whitish lines on top. (Power and ground are the thick metal lines.) Underneath the metal, the polysilicon wiring layer appears reddish or greenish. Finally, the underlying silicon is grayish. The overall layout of the chip is dense rectangles of circuitry with the space between them used for signal routing. I will discuss these circuitry blocks in detail below.

Die photo of the DX7's YM21280 Operator chip. Click this photo (or any other) for a magnified version.

Die photo of the DX7's YM21280 Operator chip. Click this photo (or any other) for a magnified version.

The photo below shows the integrated circuit with the metal lid removed, showing the silicon die inside. The pins have been flattened in the photo; they are normally bent downwards, but in a staggered pattern.7 The four rows of pins make this a quad in-line package, with twice the pin density as a regular DIP chip. As a result, this 64-pin chip has a smaller package than a standard 40-pin DIP chip.

The integrated circuit package with the metal lid removed, revealing the silicon die. Pin numbers are printed on the package, which is unusual.

The integrated circuit package with the metal lid removed, revealing the silicon die. Pin numbers are printed on the package, which is unusual.

Analog and digital

In the 1960s and 1970s, synthesizers were mostly analog.8 An oscillator was controlled by the keyboard, generating a wave at the appropriate frequency. This signal was fed through a filter, which shaped the frequency spectrum to produce the desired tone quality (timbre). Finally, the signal had its volume shaped by an envelope generator that made the volume ramp up when the key was pressed, and die off gradually when the key was released.9

An analog synthesizer was built from components such as resistors, capacitors, and op-amps, with analog voltages as the signals. One problem was that the analog synthesizers needed to be tuned since these component values could drift over time. Another problem was that the complex circuitry generated one note, so analog synthesizers were typically monophonic, producing a single note at a time. The functions of an analog synthesizer were typically controlled by patch cords, potentiometer knobs, and switches, which allowed a wide variety of sounds to be produced. This made it difficult to select the desired sound, since all the parameters needed to be set manually.

Digital synthesis provided a completely different way of generating sounds. The sound values were produced digitally by an algorithm that generated numeric values. These values were converted to the output signal voltages by a digital-to-analog converter (DAC). Digital synthesizers solved many of the problems of analog synthesis: they could easily play multiple notes at once (i.e. polyphony), configurations could be stored as digital files, they could be controlled digitally10, they replaced precision analog components with cheaper digital circuits, and they produced new classes of sounds. The DX7 wasn't the first digital synthesizer, but it was the first to achieve commercial success. It became one of the best-selling synthesizers ever, with over 150,000 sold.

The Yamaha DX7 synthesizer with its 61-key keyboard and digital controls. Photo by rockheim (CC BY-NC-SA 2.0).

The Yamaha DX7 synthesizer with its 61-key keyboard and digital controls. Photo by rockheim (CC BY-NC-SA 2.0).

FM synthesis

The DX7 uses FM synthesis to generate its sounds.11 The idea is that you start with a sine wave (the carrier signal) and perturb it with another signal (the modulating signal). The modulating signal changes the phase (and thus the frequency) of the carrier, creating complex harmonic structures.

The digital implementation of frequency modulation starts with a lookup table that holds a digitized sine wave. By stepping an index through the table at a specific rate, you can produce a sine wave of a fixed frequency. To make this concrete, suppose the table is 4096 entries long and the index is updated at 40960 Hertz. If you increment the index by 100 each time, you'll cycle through the table 1000 times every second, so a sine wave at 1 kHz will be produced. The index represents the phase of the signal: as the index moves through the table, this corresponds to a phase of 0 to 2π and an output of sin(0) through sin(2π). Changing the increment value controls the frequency. For instance, an increment of 44 would produce 440 Hz.12

The next step is to modulate the output by adding a modulation signal to the index. When the modulation signal increases, the index will move through the table faster, increasing the output frequency. When the modulation signal decreases, the index will step through more slowly, decreasing the output frequency.

Digital synthesis can be implemented with straightforward hardware: a sine-wave table, an increment value that controls the frequency, and an adder that adds the increment to the table index (phase angle) each time step. Frequency modulation can be implemented by another adder to add the modulation value to the table index (phase angle).

The interactive tool below illustrates FM synthesis and the effects of changing the modulation frequency and amount of modulation.13 The modulation signal is shown in yellow and the output is shown in red. (The carrier is fixed at 440 Hz.) Low levels of modulation distort the output waveform, while high levels create very complex waveforms. If the modulation and carrier frequencies have integer ratios, the output is periodic. But a detuned modulation frequency results in a complex, more bell-like sound.


Modulation level: 1
Modulation frequency ratio: 2

As you can see, a single modulator produces a variety of timbres and complex, unpredictable waveforms. However, the DX7 provides multiple modulators combined in various ways, making the sounds vastly more varied. For each note, the DX7 provides six oscillators (called operators) that can be combined in 32 different ways (called algorithms), shown below. For example, in algorithm 1, operator 6 modulates operator 5 which modulates operator 4 which modulates operator 3, which produces a sound. Meanwhile, operator 2 modulates operator 1, producing a second sound. Other algorithms combine the six operators in different ways. The level of each operator is controlled by a different envelope, so the note's timbre can evolve in complex ways over time.14

A chart of the DX7's algorithms, from the patent.

A chart of the DX7's algorithms, from the patent.

Inside the DX7

The DX7 can play 16 notes at once and each note has 6 operators, so there are 96 oscillators/operators in total. However, the circuitry operates sequentially, updating one oscillator and computing one operator at a time. The DX7 stores the current index (phase) values for each of the 96 oscillators but shares the circuitry that uses these values. Instead of RAM, the DX7 uses shift registers to hold data, in particular 96-stage shift registers to hold the 96 phase values. This approach drastically reduces the hardware requirements compared to using 96 separate oscillator circuits.

The diagram below shows the main architectural components of the DX7, with the components implemented in the operator chip highlighted. (The diagram, from the patent, is complicated but it shows the important features.) In the upper left, the keyboard circuitry detects when a key is played, generating a key code (KC), and a key-on signal (KON). The key code determines the frequency number, the increment used to compute the phase. The phase generator (blue) adds the increment to compute the phase, and the tone generator (yellow) produces the output sound value. The setting section in the lower left provides the user interface to configure the synthesizer. In the lower right (green), the sequence control generator sends control signals to the tone generator to implement the selected algorithm.

Architecture diagram of the DX7, from the patent.

Architecture diagram of the DX7, from the patent.

In more detail, the phase generator (blue) implements the phase counters for the 96 digital oscillators. The "frequency number generator" in the envelope chip provides the increment values to the adder. The phase values are stored in the 96-stage shift register. The tone generator (yellow) is where the modulation happens. It takes the phase values, modulates them, and converts them to sine waves, producing the output sound value. It also modifies the level of the signals, as specified by the envelope generator. The sequence code generator (green) generates control signals (A, B, C, D, E, S) that select how modulation takes place at each step. The implementation of these components will be described in more detail below.

Logarithms and exponentials

The chip uses logarithms and exponentials for many of the internal values. The underlying problem is that multiplication is much harder to perform with hardware than addition, especially with 1980s-era technology. The solution is that the chip uses base-2 logarithms in many places because adding logarithms is equivalent to multiplying the values. (The chip uses lookup ROMs in combination with bit shifting to obtain the logarithms and exponentials.)

The first role for logarithms is in the frequency input to the chip: instead of a phase increment value, it receives the base-2 logarithm of the increment. The motivation is that note frequencies are related exponentially: for instance, going up one octave doubles the frequency. Thus, shifting a note requires multiplying the frequency. Since the envelope chip represents frequencies as logarithms, the multiplication becomes a quick addition. The envelope chip then passes the corresponding phase increment to the operator chip as a logarithmic value. The operator chip uses an exponential look-up ROM to convert this value back to a linear value.

The second role for logarithms is to apply the envelope that shapes the signal's amplitude. The envelope is a time-varying multiplicative scale factor, scaling the amplitude to, say, 70% or 30%. To avoid multiplication, the logarithm of the scale factor and the logarithm of the signal are added. A second exponential look-up ROM converts the result back to a linear value. The envelope is provided to the operator chip by the envelope chip in logarithmic form. The logarithm of the sine-wave signal is conveniently obtained by storing log2(sin(x)) in the waveform ROM instead of sin(x), so the logarithm is obtained "for free".15

A look at the die

The diagram below labels the pins and the main functional blocks of the chip. The shift registers are the largest blocks of the chip, especially the phase shift registers in the upper left. ROMs are the second-largest blocks, especially the sine ROM and the two identical exponential ROMs. Adders provide most of the logic circuitry; there isn't much "random" logic compared to a processor chip, for instance. The chip has several bit shifters that shift a numeric value, multiplying or dividing it by a power of two.16 In this section, I look at the low-level circuitry of the die and how the functions are implemented.

Die with the pins and major functional blocks labeled. (Click for a larger version.)

Die with the pins and major functional blocks labeled. (Click for a larger version.)

Shift registers

The main component of the chip is storage: the parameters for each operator, the phase counters for each oscillator, the output values for each note, and so forth. The storage is not implemented as RAM or fixed registers as you might expect, but as loops of shift registers with bits constantly moving in a cycle. The idea of a shift register is that it consists of a number of stages, say 16. During each clock cycle, the bits are shifted, with each bit moving to the next stage. One bit exits the shift register. This bit (or a new bit) can be fed into the shift register input, and it will appear at the output 16 clock cycles later.

Since the circuitry works on one oscillator/operator at a time in fixed order, shift registers are an efficient way of storing data and providing it at the right time, without the need for addressing logic. In other words, during each time interval, the appropriate data pops out of the shift registers for processing. The data (unmodified or modified as appropriate) is then fed back into the inputs of the shift register to pass through another cycle.

For example, each of the 16 notes requires 8 bits of configuration storage: 5 to specify the algorithm and 3 to specify the feedback level. This storage is implemented with 8 shift registers, each 16-bits long, as shown below. To select an algorithm, the external CPU writes the appropriate value into the shift register. Note that unlike RAM, entries in the shift register cannot be read and written arbitrarily. The system can only use values when they appear on the shift register output.

The configuration data shift registers are organized as eight 16-bit shift registers.

The configuration data shift registers are organized as eight 16-bit shift registers.

The schematic below shows how one stage of the shift register is implemented. The chip uses a two-phase clock. In the first phase, clock ϕ1 goes high, turning on the first transistor. The input signal goes through the inverter, through the transistor, and the voltage is stored in the capacitor. In the second phase, clock ϕ2 goes high, turning on the second transistor. The value stored in the capacitor goes through the second inverter, through the second transistor, and to the output, where it enters the next shift register stage. Thus, in one clock cycle (ϕ1 and then ϕ2), the input bit is transferred to the output. (The circuit is similar to dynamic RAM in the sense that bits are stored in capacitors. The clock needs to cycle before the charge on the capacitor drains away and data is lost. The inverters amplify and regenerate the bit at each stage.)

Schematic of one stage of the shift register.

Schematic of one stage of the shift register.

The diagram below shows the physical implementation of one shift register stage. It's a bit confusing because there are three layers: the whitish metal on top, doped silicon regions on the bottom (which appear outlined in black), and polysilicon lines in the middle (which appear reddish or greenish). Transistors are formed when a polysilicon line crosses doped silicon. A capacitor is created similarly, with a polysilicon line and doped silicon forming the two plates of the capacitor. An inverter is created from a transistor that pulls the output to ground, along with a pull-up resistor. (The pull-up resistor is actually another transistor, specially doped to make it a depletion transistor.)

Implementation of one bit of the shift register. This matches the earlier schematic, but shows the components of the inverters.

Implementation of one bit of the shift register. This matches the earlier schematic, but shows the components of the inverters.

ROMs

The next building block of the chip is ROM storage, used for the numeric look-up tables and other purposes. One ROM computes the log2 sine for the waveform. The chip has two identical exponential ROMs computing 2x. One converts the log-frequency increment value into a linear increment value. The second converts the log waveform value into a linear waveform value. An algorithm ROM defines the 32 algorithms, specifying the behavior of each of the 6 operators in each algorithm. Another ROM changes the behavior of different notes and operators in a way that is still a mystery to me.

A ROM is arranged in a grid. At each position, silicon is doped to either create a transistor or no transistor, representing a 0 or 1. In a typical ROM, five address bits energize one of 32 vertical select lines to select one column of the ROM. The rows are organized in groups of 8 and three more address bits select one row from each group to yield output bits.

The diagram below shows part of the ROM circuitry. The magnified portion has been colored to show the bits. The vertical column select lines of polysilicon are colored yellow. The ROM is programmed by the pattern of doped silicon (blue). A transistor (red) is formed when a polysilicon line crosses a doped silicon region; the transistors are indicated in red and indicate the bit pattern.

Closeup of the log-sine ROM showing individual bits.

Closeup of the log-sine ROM showing individual bits.

The ROMs use several tricks to reduce space. Duplicate rows are folded together, such as high-order bits that are zero for a range of values. The sine ROM apparently uses delta encoding for alternating values; since the delta values are small, they have a lot of zero bits that can be folded. As a result, the values stored in the ROM are not obvious from the bit patterns. I'm still investigating the ROM representations and will discuss them later.

Adder

Another key building block of the chip is the adder, which sums two binary numbers. The chip has multiple adders: for the phase accumulators, inside the operators, and to apply the envelope.

A multi-bit adder is built from full adders, a circuit that adds two bits (along with a carry-in bit), and produces a sum bit (along with a carry-out bit). The diagram below shows how a one-bit full adder is implemented, adding bits A and B along with a carry-in, producing an output sum bit and a carry bit.17 Note that the outputs are inverted; other parts of the circuitry deal with that.

Structure of the full-adder circuit used in the chip.

Structure of the full-adder circuit used in the chip.

By combining multiple one-bit adders, multi-bit binary numbers can be added as shown in the 23-bit adder below. Note that the adder is at an angle relative to the shift registers. This is a clever trick for performance. One problem with adders is dealing with carries, which may need to propagate through all the bits. (The binary equivalent of needing to repeatedly carry the 1 when computing 999999+1.) The solution is to break the sum into 6 parts. Only 4 bits of each sum are added in each clock phase, so the carry only needs to propagate through 4 bits rather than all 23. The next chunk is added in the next clock phase, and so on.18

The phase adder is at the left of the shift registers that hold the 96 phase values.

The phase adder is at the left of the shift registers that hold the 96 phase values.

Bit shifter

The final building block that I'll discuss is the bit shifter, which shifts a binary value left or right numerically, which is equivalent to multiplying or dividing by a power of 2. A typical shifter is built in two layers: the first layer shifts by 0, 1, 2, or 3 positions. The second layer shifts by 0, 4, 8, or 12 positions. The combination of the two layers permits any shift between 0 and 15 bit positions.

The diagram below shows part of the shifter that shifts by 0, 1, 2, or 3 positions, controlled by the horizontal lines. I've highlighted one of the bits in green. If the "shift 0" line is activated, the leftmost green transistor (circled) will turn on and the green input bit will exit unshifted at the first output position. Likewise, if the "shift 1" line is activated, the second green transistor will turn on and the green bit will exit at the second position, shifted one position to the right. The "shift 2" and "shift 3" lines will cause the green bit to exit two or three positions to the right. The remaining transistors (circled in black) act in the same manner to shift the other bits. The result is that all the bits will pass straight throw (shift 0), or be shifted 1, 2, or 3 positions to the right.

Detail of a shifter circuit.

Detail of a shifter circuit.

Shifters are used in combination with the exponential ROMs to compute 2x. The ROM is applied to the fractional part of x, while the shifter is controlled by the integer part. This is much more efficient than using a large ROM to look up the complete value. Another shifter provides a shift of 0 to 6 bits to scale the operator feedback value. A shifter also scales the output value to increase the dynamic range.

Combining and modulating operators with an algorithm

The DX7 generates each note by combining and modulating six operators (oscillators) according to a particular algorithm. This happens sequentially: the chip processes operator 6 for channels 1 through 16, then operator 5 for all the channels, and so forth, ending with operator 1. This cycle of 96 operations repeats, providing new sound values 49096 times a second.19

The diagram below shows a typical algorithm. Operator 6 modulates operators 4 and 5, while operator 3 modulates operators 1 and 2, as well as itself. Operators 1, 2, 4, and 5 produce outputs, which are combined to create the final sound value. This section discusses the circuitry that performs the modulations for the specified algorithm.

Algorithm #19 combines the 6 operators in a specific way.

Algorithm #19 combines the 6 operators in a specific way.

The diagram below shows the implementation of the circuitry to process operators. The lower "operator" box is the circuitry previously discussed: the first adder adds the modulation value f(ωmt) to the current phase value kωt and looks up the value in the sine table. The second and third adders apply the envelope. Finally, the log/linear converter is implemented by the exponential ROM and shifter described earlier.

Diagram showing the construction of an operator, from the patent.

Diagram showing the construction of an operator, from the patent.

The upper half of the diagram determines the appropriate modulation value f(ωmt) for the selected algorithm and operator. This circuitry is complicated, since there are 5 different cases that the circuitry must handle, chosen by the selector.20 The top circuit (selector input 5) implements the feedback of an operator to itself. To provide feedback, the previous two values are stored in 16-stage shift registers, scaled by the feedback level parameter (FBL), and output as the modulation value. (Two previous values are averaged to stabilize the feedback.) Since the 16 channels are processed in sequence, the 16-stage shift registers store the feedback values until the next cycle. The next circuit (selector 4) uses the value of the self-feedback operator to modulate another operator. Selector 3 provides a shift register and adder to sum or delay values. (It is where multiple values are summed to produce the final output.) Selector 2 allows a sum to be used for modulation. Selector 1 is the simple case where the previous operator provides the modulation (e.g. 6 modulating 5). Finally, if no value is selected, the signal remains unmodulated. Control signals A, B, C, D, and E select the specific signal paths.

The diagram below shows the implementation of the modulation circuitry on the die. This circuitry corresponds to the upper part of the patent diagram above; the component numbers match the patent numbers. This circuitry occupies the middle portion of the die, with the shift registers taking up the bulk of the space. The adders and feedback level shifter are also visible.

Implementation of the modulation circuitry on the die.

Implementation of the modulation circuitry on the die.

The algorithms are specified by the algorithm ROM (below). This 192×9 ROM produces 9 control signals for the 6 operators in the 32 algorithms. The 16-stage shift register described earlier holds the selected algorithm numbers and provides the input to the ROM. Curiously, it appears that the chip permits each of the 16 notes to use a different algorithm, even though the DX7 does not support this feature.

The algorithm ROM. The circuitry at the top decodes the address (algorithm and operator number), selecting a column from the body of the ROM below. The 9 outputs (A, B, C, D, E, and S) are at the left.

The algorithm ROM. The circuitry at the top decodes the address (algorithm and operator number), selecting a column from the body of the ROM below. The 9 outputs (A, B, C, D, E, and S) are at the left.

Conclusion

The DX7 was a groundbreaking synthesizer and this chip was at the heart of it, so in a sense this chip was responsible for the 80's sound. Studying the chip's die reveals some interesting circuits. Uncovering the secrets of how the chip operates may help build more accurate DX7 emulators. The chip is complex and this article just scratches the surface so I plan to study the chip in more detail. In particular, I intend to extract the data from the ROMs to find out exactly how the waveforms are represented. In any case, I hope you've found this deep dive into a sound chip interesting.

I announce my latest blog posts on Twitter, so follow me @kenshirriff. I also have an RSS feed. Thanks to Jacques Mattheij and Anthony Richardson for providing the chip and discussion.

Notes and references

  1. The Economist published an article on how the DX7 changed modern music. The article called the DX7 "one of the most important advances in the history of modern popular music," altering the soundscape more than any instrument since the electric guitar. 

  2. The 40% number is from Prof. Megan Lavengood's detailed research on the DX7, in particular What Makes It Sound '80s: The Yamaha DX7 Electric Piano Sound. One interesting factor from Lavengood's research is the importance of preset sounds in the DX7, a feature that most earlier synthesizers didn't have. As a result, most users didn't program the DX7 but just pressed a button to use a preset sound. Programming the DX7 was much more difficult than analog synthesizers both because of the non-intuitive nature of FM synthesis and the DX7's arcane user interface: buttons and menus rather than knobs and sliders that provided immediate feedback. The DX7 also "democratized" the use of synthesizers through its low price: under $2000 (at the time), much cheaper than competing synthesizers. (The Fairlight CMI was $25,000 in comparison.) 

  3. To hear the DX7's 32 classic factory patches, check out this video. Some good examples of 80s songs using these patches are in this video

  4. The DX7 contains two CPUs: a Hitachi 63B03 and a Hitachi 6805S, both related to the 8-bit Motorola 6800. These processors manage the keyboard, user interface controls, MIDI communication, low-frequency oscillator, and so forth. These processors were not powerful enough to do the sound synthesis; they sent data to the envelope and synthesis chips, which generated the sounds. 

  5. It's unclear if the official part numbers of the chips are YM2128/YM2129 or YM21280/YM21290. The chip package and die are labeled YM2128, but the circuit board, schematic, and documentation are labeled YM21280. The chip is also known as the FM Operator Type S chip or OPS chip. 

  6. I estimate that the chip has about 45,000 transistors, a bit less than the 80186 processor (1982). I measure the feature size as 3 µm, a step behind the 1.5 µm process introduced in 1981. My conclusion is that the chip was advanced, but not quite cutting-edge. The die is approximately 7.6×6.6mm. 

  7. The photo below shows the YM21280 chip, showing the staggered pins.

    The Yamaha YM21280 chip. Photo courtesy of Jacques Mattheij.

    The Yamaha YM21280 chip. Photo courtesy of Jacques Mattheij.

     

  8. I'm going over synthesizer history extremely briefly, so I'm oversimplifying things. For instance, there are different architectures for analog synthesizers, multiphonic analog synthesizers, digitally-controlled analog synthesizers, and so forth. Wikipedia provides a detailed history. 

  9. Typically, an envelope generator used an ADSR (attack, decay, sustain, release) model. The attack is the spike in amplitude when the key is pressed, followed by a decay to a lower level. The note remained at the sustain level as long as the key was pressed, and then fell off during the release level. The times and levels could be adjusted as desired. For example, a piano-like sound has a rapid attack and decay for the initial sound, while a trumpet-like sound would have a slower attack as the note builds. 

  10. The Musical Instrument Digital Interface (MIDI) standard was announced in 1982, allowing synthesizers to be controlled over a digital link. MIDI could be used for remote keyboards, playing notes via a sequencer, computer composition, and other applications. Although MIDI is a digital protocol, the first synthesizers to use it were analog, such as the Roland Jupiter-6, converting the digital messages to analog control voltages. 

  11. Technically, the DX7 uses phase modulation (PM) instead of frequency modulation (FM), but the two techniques are related. In phase modulation, the basic frequency stays constant but the phase of the signal is increased or decreased. But if the phase increases, the oscillations happen faster so the frequency is increased. Likewise, a decrease in phase stretches out the waveform, reducing the frequency. It turns out that phase modulation is the same as frequency modulation using the derivative of the modulation signal. (Note that if the phase shift is constant, the PM output has the original frequency, just shifted in time. But a constant modulation signal for FM results in a constant frequency shift.)

    Since the derivative of a sinusoid is another sinusoid, an FM signal and a PM signal look the same with sinusoidal modulation. However, the derivative is scaled by the frequency, with the result that PM signals are more sensitive to modulation by high frequencies than low frequencies. (An FM signal will have the same frequency sweep with slow modulation and fast modulation, while a PM signal will have little frequency change if the modulation is slow.) The results of frequency modulation and phase modulation will also be different for non-sinusoidal modulation, since the derivative will be different from the modulation signal. 

  12. Note that the frequency resolution in this example isn't very good if you use integers for the increment size. For example, an increment of 44 gives 440 Hz and an increment of 45 gives 450 Hz and you can't get a frequency in between. The solution is to include a fractional part in the increment and index to provide more control. 

  13. My synthesis widget illustrates FM synthesis (actually PM synthesis) in general. It doesn't simulate the DX7 specifically. 

  14. The DX7's envelopes are complex. A typical synthesizer's attack-decay-sustain-release envelope is defined by four parameters: the attack speed, decay speed, sustain level, and release speed. The DX7's envelope has eight parameters: L1-L4 and R1-R4, defining both the level and rate for the four phases, providing more control. Each of a sound's 6 operators has its own envelope, adding even more complexity. 

  15. I don't know yet how the negative half of the sine wave is represented logarithmically. My guess is that the sign is represented separately so the waveform remains positive. 

  16. Note that the bit shifters are unrelated to the shift registers, both in design and function. The shift registers shift are used for storage, shifting numbers through time. The bit shifters operate numerically, scaling a number. 

  17. The adder's complex gates make more sense if you think through the cases. You'll have a carry-out if both inputs A and B are set. You'll also have a carry-out if you have a carry-in and at least one of A or B. The sum bit will be set if you have A, B, and carry-in set, which is handled by the lowest AND gate. The sum bit will also be set if you have at least one of A, B, and carry-in, but you need to exclude the case where two of them are set, which is handled by ANDing in the inverted carry-out.

    The underlying reason for the complex OR-AND-NOR logic instead of multiple, simpler gates is that each NMOS gate requires a pull-up resistor. Thus, one complex gate may be smaller than several simple gates because you reduce the number of pull-up resistors. 

  18. The adder can be viewed as a six-stage pipeline, with each stage adding a few of the bits. A sum needs to pass through all the stages to be completely added. Note that the stages are all active at the same time, but they are acting on different sums. 

  19. Note that the algorithms are carefully designed so operators are modulated only by operators with a higher number. Thus, starting at #6 and ending at #1 ensures that values are calculated in the right order. The 32 algorithms make it look like almost anything is possible, but the hardware creates several constraints that limit the possibilities. For instance, there is only one sum/delay register so you can't sum modulators and the output at the same time. You can't delay a non-feedback operator after an output takes place; for instance, algorithm 11 has 6 delayed to modulate 3, but only because there haven't been any outputs at that point. You can only have one self-feedback loop. 

  20. The operator circuit is a bit tricky to understand. One factor to keep in mind is that the computation is spread out over time, computing one operator at a time. Moreover, the computations are interleaved across the 15 voices, so data needs to be stored in a shift register until the next operator is processed. Although the algorithms look straightforward in the diagrams ("operator 6 feeds into operator 5"), the implementation becomes complicated when this is split into time slices. 

  21. Patent 4554857 "Electronic musical instrument capable of varying a tone synthesis operation algorithm" provides detailed information on the architecture of the DX7 synthesizer. The DX7 Schematics provide circuit-level information, including the chip pinout (below). The DX7 Technical Analysis page summarizes what is known about the DX7's internals.

    The DX7 schematic provides the chip's pinout.

    The DX7 schematic provides the chip's pinout.

     

Reverse-engineering an unusual IBM modem board from 1965

The vintage IBM circuit board below has a large metal block on it that caught my attention, so I investigated it in detail. It turns out that the board is part of a modem, and the large metal box is a transformer. This blog post summarizes what I learned about this board, along with a bit of history on modems.

The IBM modem board, type HGB.

The IBM modem board, type HGB.

This board is a Standardized Modular System (SMS) card, but a very unusual one. In the late 1950s, IBM introduced the Standardized Modular System card, small circuit boards that held a simple circuit, and used these boards to build computers and peripherals into the mid-1960s. The idea was to design a small number of standardized boards that implemented logic functions and other basic circuits. The number of different board designs spiraled out of control, however, with thousands of different types of SMS cards. (I've made an SMS card database describing over 1400 different cards.)

This is a typical SMS card, implementing a triple AND gate.

This is a typical SMS card, implementing a triple AND gate.

Most SMS cards look like the one above, so the card with the metal block struck me as very unusual. Although some SMS cards are double-width "twin cards", I'd never seen one with a large metal block sandwiched between two boards, so it got my curiosity.

One suggestion was that the metal box was a oven-controlled crystal oscillator (OCXO). A OCXO is often used when a high-precision frequency source is required. The frequency of a quartz crystal varies with temperature, so by putting the crystal in a temperature-controlled module (like the one below), the frequency remains stable.

A vintage crystal oven that plugged into a tube socket. Photo by Wtshymanski (CC BY-SA 3.0).

A vintage crystal oven that plugged into a tube socket. Photo by Wtshymanski (CC BY-SA 3.0).

However, measurements of the module by Curious Marc and Eric Schlaepfer (TubeTimeUS) determined that the metal box was a large transformer (1:1 ratio, about 8 mH inductance). The photo below shows the four connections to the windings, while the external metal wires grounded the case. The transformer is heavy—the board weighs almost exactly one pound—so it's probably filled with oil.

The transformer on the modem board.

The transformer on the modem board.

The board shows its age through its germanium transistors, which were used before silicon transistors became popular. Most of the transistors are PNP, apparently because it was easier to produce PNP germanium transistors than NPN. (Silicon transistors are the opposite with NPN transistors much more common than PNP, largely because the electrons in NPN transistors move more easily than the holes in PNP transistors, giving better performance to NPN transistors.)

Closeup of the Texas Instruments transistors. Most of the transistors on the board were PNP type 033.

Closeup of the Texas Instruments transistors. Most of the transistors on the board were PNP type 033.

I found a document1 that gave the board's part number as a transmitter board for an IBM modem, transmitting data across phone lines. The large transformer would have been used to connect the modem to the phone lines while maintaining the necessary isolation. The modem used frequency-shift keying (FSK), using one frequency for a 1 bit and a second frequency for a 0 bit. I reverse-engineered the board by closely studying it, and discovered that the board generates these two frequencies, controlled by a data input line. This confirmed that the board was a modem transmitter board.

The photo below shows the underside of the board, with the traces that connect the components. The board is single-sided, with traces only on the underside, so traces tend to wander around a lot, using jumper wires on the other side to cross over other traces. (It took me a while to realize that the transformer's case was just wired to ground, since the trace wanders all over the board before reaching the ground connection.) At the bottom of the board are the two gold-plated 16-pin connectors that plug into the system's backplane. The connector on the left provides power, while the connector on the right has the signals.

The underside of the printed circuit board for the modem card.

The underside of the printed circuit board for the modem card.

The result of my reverse-engineering is the schematic below. (Click for a larger version.) The circuit seems complicated for a board that just generates a varying frequency, but it took a lot of parts to do anything back then. At the left of the schematic are the board's two inputs: a binary data signal, and an enable signal that turns the oscillator on. Next are the oscillator that produces the signal, and a 13 millisecond delay (both discussed below). The output from the oscillator goes through a filter that makes it somewhat more sine-like. The signal is then amplified to drive the transformer, as well as to produce a direct output.

Reverse-engineered schematic of the IBM modem board. (Click this image, or any other, for a larger version.)

Reverse-engineered schematic of the IBM modem board. (Click this image, or any other, for a larger version.)

The oscillator

The oscilloscope trace below shows the output that I measured from the board after powering it up. The blue line shows the data input, while the cyan waveform above shows the frequency output. You can see that the output frequency is different for a "1" input and a "0" input, encoding the data. (The height also changes, but I think that's just a side-effect of the circuit.)

Oscilloscope trace showing how the frequency of the output signal varies with the input data.

Oscilloscope trace showing how the frequency of the output signal varies with the input data.

The modem is supposed to generate frequencies of 1020 Hertz for a "mark" (1) and 2200 Hertz for a "space" (0). However, I measured frequencies of 893 and 1920, about 13% too low. This seems like reasonable accuracy for components that are 55 years old. (I don't know what the expected accuracy was at the time. There aren't any adjustments, so the frequencies probably weren't critical. Also, since the two frequencies differ by more than a factor of two, there's a large margin. Another possibility is that I guessed that the board is powered with ±12V but different voltages might yield more accurate frequencies.)

The modem operated at up to 600 baud. This corresponded to 100 characters per second for 6-bit characters, or 75 characters per second for 8-bit characters. The oscilloscope trace below shows the signal changing at 600 baud. At this rate, one bit is represented by only 1.7 cycles of the slower frequency, so the receiver doesn't have a lot of information to distinguish a 0 or a 1 bit. Also note that the waveform is somewhat distorted, not a clean sine wave.

The output signal when fed bits at 600 baud (i.e. a 300 Hertz square wave).

The output signal when fed bits at 600 baud (i.e. a 300 Hertz square wave).

The heart of this board is the frequency-shift keying oscillator that generates the variable output frequency.2 The input data bit selects one of two control voltages to the oscillator, controlling its output frequency.

The oscillator is a fairly common transistor-pair circuit. The diagram below illustrates how it works. (It uses PNP transistors and runs on -12 volts, so ground is the higher voltage, which may be a bit confusing.) Suppose transistor T1 is on and T2 is off. Capacitor C2 will discharge through resistor R2, as shown. When its voltage reaches about -0.6 volts, T2 will turn on. This will pull the right side of C1 up to ground; it was previously at -12 volts because of R4. This causes the left side of C1 to jump up to about +12 volts, turning off T1.

The process then repeats on the other side, with C1 discharging through R1 until T1 turns off and T2 turns on. The result is that the circuit oscillates. The discharge rate is controlled by the values of R1 and R2, and the control voltage; a lower voltage will cause the capacitors to discharge faster and thus faster oscillations.

Oscilloscope traces of the oscillator, showing the alternating decay cycles.

Oscilloscope traces of the oscillator, showing the alternating decay cycles.

The traces above show the action of the oscillator, producing the cyan output signal. The yellow curve shows the voltage on the left side of C2, the pink trace shows the voltage on the left side of C1, and the blue trace shows the voltage on the right side of C2. The pink and blue traces show the alternating discharge cycles for the capacitors; the faster discharge yields a higher output frequency.

Schematic of the oscillator at the heart of the board.

Schematic of the oscillator at the heart of the board.

The output of the oscillator is essentially a square wave, so it goes through some resistor-capacitor filtering stages that shape it to better approximate a sine wave. The top line (yellow) shows the output of the oscillator, and the lines below show the signal as it progresses through the filter. The result is still fairly distorted, but much smoother than the original square wave.

The square wave signal and the results after filtering.

The square wave signal and the results after filtering.

Delay circuit

Another interesting circuit takes the enable signal and outputs this signal delayed by 13 milliseconds. When I reverse-engineered this circuit (below), I figured it was just buffering the signal but it appeared overly complex for that. I measured its behavior and discovered that it implements a delay.

Reverse-engineered schematic showing the 13ms delay circuit on the modem board.

Reverse-engineered schematic showing the 13ms delay circuit on the modem board.

The circuit contains several buffers, but the heart of it is a resistor-capacitor delay. When the enable line is activated, the capacitor is pulled to -12V slowly through the resistors, creating the delay. The photo below shows the delay capacitor and associated resistors.

The diode (striped glass cylinder), resistors (brown striped components), and capacitor (larger metal cylinder) create the delay.

The diode (striped glass cylinder), resistors (brown striped components), and capacitor (larger metal cylinder) create the delay.

The oscilloscope trace shows the operation of the delay circuit. When the (inverted) enable line (blue) goes low, the signal output (cyan) immediately turns on. However, the enable outputs (yellow and pink) are delayed by about 13 milliseconds.

Oscilloscope trace of the delay circuit.

Oscilloscope trace of the delay circuit.

I don't know the reason behind this delay circuit. Maybe it gives the oscillator time to settle after being enabled? Maybe the modem protocol uses 13 milliseconds of signal to indicate the start of a new message?

Some background on Teleprocessing

If you used computers in the 1990s, you probably used a dial-up modem like the one below to call a provider such as AOL through your phone line. The name "modem" is short for MOdulator-DEModulator, since it modulates the analog signal to encode the digital bits, as well as demodulating the received signal back to digital. In this way, the modem provided the connection between your computer's digital signals and the analog frequencies transmitted by phone lines.

A Hayes modem from 1982. Photo by Aeroid (CC BY-SA 4.0).

A Hayes modem from 1982. Photo by Aeroid (CC BY-SA 4.0).

The history of modems goes back much further, though. IBM introduced what they called "Teleprocessing" in the early 1940s, converting punch-card data to paper tape and sending it over telegraph lines for the U.S. Army.1 In the early 1950s, a device called Data Transceiver removed the intermediate paper tape, connecting directly to a telephone line. With the introduction of the IBM System/360 mainframe in 1964, Teleprocessing became widespread, used for many applications such as remote data entry and remote queries. Banking and airline reservations made heavy use of Teleprocessing. Timesharing systems allowed users to access a mainframe computer over remote terminals, kind of like cloud computing. Even the Olympics used Teleprocessing, transmitting data between widely-separated sites and a central computer that computed scores.

Back then, modems were large cabinets. The board that I examined could be used in an IBM 1026 Transmission Control Unit (below).3 This low cost unit was designed to "make a modest start toward satisfying your data communication requirements ... until it is time to step up to more powerful transmission control units". It could connect a computer such as the IBM 1401 to a single communications line.

IBM 1026 Transmission Control Unit. Photo from Computer History Museum.

IBM 1026 Transmission Control Unit. Photo from Computer History Museum.

Larger installations could use the IBM 1448 Transmission Control Unit (below). This refrigerator-sized cabinet was 5 feet high and could support up to 40 communications links.

The IBM 1448 Transmission Control Unit was a large cabinet. Photo from IBM 1448 Transmission Control Unit manual.

The IBM 1448 Transmission Control Unit was a large cabinet. Photo from IBM 1448 Transmission Control Unit manual.

Nowadays, people often use a cable modem or DSL modem to connect to the Internet. Fortunately technology has greatly improved and these modems aren't the large cabinets of the 1960s. Speeds have also greatly improved; a modern 180 Mbps network connection is 300,000 times faster than the 600 baud modem board that I examined. At that rate, a web page that now loads in a second would have taken over three days!

Conclusion

This may seem like an overly detailed analysis of a random circuit board. But I was curious about the board due to its unusual transformer. I also figured it would be interesting to reverse-engineer the board to see how IBM built analog circuits back in the 1960s. Hopefully you've enjoyed this look at a vintage modem board.

Side view of the modem SMS card. The transformer is the metal box at the left.

Side view of the modem SMS card. The transformer is the metal box at the left.

I announce my latest blog posts on Twitter, so follow me at kenshirriff. I also have an RSS feed. Thanks to Nick Bletsch for sending me the board. I discussed this board on a couple of Twitter threads and got a bunch of interesting comments.

Notes and references

  1. For more information, see Introduction to Teleprocessing Technical information is in Teleprocessing—General FE Handbook page 7-7 lists part number 373807 (my board) as a Transmitter card Type 2A. Page 7-30 then describes some characteristics of this modem type. IBM Teleprocessing 1940-1960 provides a historical look. 

  2. The oscillator is essentially a voltage-controlled oscillator (VCO). However, since it only takes two different input voltages (about -2.5 and -9 volts), the circuit isn't as challenging as a typical VCO, which takes a wide range of inputs and needs to have a linear response. 

  3. The modem card I examined could be used with an IBM 1050 or 1060 Data Communications System, which I believe was the remote terminal subsystem. It could also be used with the IBM 1448 and IBM 1026 Transmission Control Units. (The IBM 1448 connected to an IBM 1410 or IBM 7010 computer.) 

Reverse-engineering a vintage power supply chip from die photos

I recently did a PC power supply teardown so I figured it would be interesting to go deeper and see what happens inside the power supply's control IC. The die photo below shows the UC3842 chip, which was very popular in older PC power supplies.1 (The chip was introduced in 1984 but this die has a date of 2000.) The tiny silicon die is patterned to create the transistors, resistors and capacitors that make up the circuit. The lighter-colored lines are the metal layer on top of the silicon, forming the chip's wiring. Around the edges, square pads provide the connections from the die to the IC's external pins; tiny bond wires connect the pads to the chip's external pins.

The UC3842 die. Around the outside, the pins are labeled. (Click this image, or any other, for a larger version.)

The UC3842 die. Around the outside, the pins are labeled. (Click this image, or any other, for a larger version.)

The photo below shows the chip mounted on the power supply board. For the die photos, I extracted the die from the epoxy package by heating it and then cleaned up the die with a few drops of sulfuric acid. I took photos with a microscope and stitched them together to create a high-resolution image.

The UC3842 chip mounted on the power supply's circuit board. The white glob is silicone, which held many of the power supply components in place.

The UC3842 chip mounted on the power supply's circuit board. The white glob is silicone, which held many of the power supply components in place.

The chip is from the PC power supply below. This is a switching power supply so it uses several steps to produce the output voltages. On the primary side, the input AC is filtered and then converted to high-voltage DC (roughly 170 to 340 volts) by the bridge rectifier, and the large capacitors smooth it out. Next, the DC is chopped into pulses thousands of times a second by the switching transistor. The control IC constantly adjusts the width of the pulses to regulate the output voltage. These pulses go into the transformer, which converts the high-voltage pulses into low-voltage, high-current. The diodes on the secondary side produce the multiple DC outputs, which are smoothed by the inductors and capacitors.

An ATX power supply with the main components labeled. I removed the heat sinks and capacitors to improve visibility.

An ATX power supply with the main components labeled. I removed the heat sinks and capacitors to improve visibility.

This process may seem complex, but it has several advantages over putting the AC from the wall directly into a transformer. First, because the transformer operates at thousands of hertz instead of 60 hertz, a much smaller transformer can be used. Second, chopping the DC into pulses wastes very little energy, compared to a "linear regulator" that converts excess voltage into heat. The result is a power supply that is inexpensive, lightweight, and efficient.

In this blog post, I'll explain the construction of the controller IC, the building blocks of its circuitry, and how it operates. This may be a lot for one blog post, but we'll see how it goes.

Some silicon components

This IC is built from a type of transistor known as bipolar, rather than the MOS transistors that are typically used in modern ICs. The highly-magnified photo below shows an NPN transistor as it appears on the chip, with a cross-section drawing underneath. The metal wiring on top of the transistor is visible as the wide light-colored lines. Different regions of the silicon are doped with impurities to change its electrical properties, yielding N-type and P-type silicon. These regions are faintly visible in the photo. An oxide layer on top of the silicon provides insulation from the metal, except where a contact (black circle or oval) provides a connection between the metal and silicon.

Diagram illustrating the construction of an NPN transistor.

Diagram illustrating the construction of an NPN transistor.

The chip also uses many PNP transistors. Although you might expect a PNP transistor to simply be the reverse of an NPN transistor, it has a different structure, with the regions arranged laterally instead of vertically. The collector and base form concentric square rings around the emitter. The base wire is not connected to the base region directly. Instead, the wire is at a distance, and the base signal travels underneath through the N layer.

Diagram illustrating the construction of a PNP transistor. The dotted lines represent how the collector and base surround the emitter.

Diagram illustrating the construction of a PNP transistor. The dotted lines represent how the collector and base surround the emitter.

Because this chip consists of mostly analog circuitry, it uses a lot of resistors. The photo below shows several typical resistors, the thin grayish-green lines. The resistors are connected to metal wires at either end, the wider metallic-looking traces. Some resistors are straight lines, while others zig-zag to fit a longer resistor (i.e. higher resistance) into the available space.

Resistors on the die.

Resistors on the die.

Resistors are an inconvenient component for integrated circuits. First, they take up a relatively large amount of room, especially long, high-value resistors. Second, they are inaccurate; their value can vary unpredictably from chip to chip, or even on a single chip. For this reason, circuits are typically designed so they depend on the ratio between two resistors, which is much more stable.

Capacitors are also bulky so the chip uses only a few, to stabilize its amplifiers. A capacitor can be formed by using the underlying silicon as one plate, and then putting a layer of polysilicon on top to form the second plate, separated by a thin layer of insulating oxide. Polysilicon is a special type of silicon, and appears green in the photo.

A capacitor on the die.

A capacitor on the die.

Architecture of the chip

To summarize the chip, it generates pulses to control the switching transistor that feeds the transformer. These pulses are at a fixed frequency (e.g. 52 kHz), but the width of the pulses increases if more power is needed to keep the output voltage constant. The chip constantly adjusts the pulse width based on voltage and current feedback from the power supply, keeping the output voltages stable even as the load changes.

The UC3842 die. Main functional blocks of the die are labeled.

The UC3842 die. Main functional blocks of the die are labeled.

The die image above has been labeled with the main functional blocks of the chip. It can be compared with the block diagram (below) from the datasheet. I'll describe the main functional blocks before explaining how they are implemented.

Block diagram of the UC3842 chip with annotation. Original from the datasheet.

Block diagram of the UC3842 chip with annotation. Original from the datasheet.

The power supply's pulses start with the chip's oscillator, which generates pulses at a frequency controlled by an external resistor and capacitor. Below the oscillator is the feedback circuitry that adjusts the pulse width based on voltage and current feedback. The PWM latch (Pulse Width Modulation) combines the oscillator signal and the feedback to generate pulses of the right duration. These pulses go to the high-current output stage, which drives the external switching transistor.

The chip itself is powered by an auxiliary winding on the transformer that provides 15 to 30 volts. The chip regulates this down to an internal 5-volt supply, using a special circuit called a bandgap regulator to keep this voltage stable within 2%, even with changing temperature. (This regulated reference voltage is also provided externally as Vref for external circuitry that needs a stable voltage.)

A potential problem is that if the power supply is unplugged (for example), the chip may behave unpredictably as the input voltage drops. To guard against this, an Under-Voltage Lock Out (UVLO) feature shuts the chip down cleanly if the input drops too low.

A final interesting feature of the chip is how it starts up. As described above, the chip is powered by the transformer, but the chip generates the pulses that feed the transformer. This seems like a chicken-and-egg problem, since the chip won't receive any power until it is already driving the transformer. The solution is a connection to the rectified line voltage through a very large resistor, so the chip receives hundreds of volts but just microamps of current. A Zener diode (below) drops this startup voltage down to 34 volts, enough for the chip to start generating pulses, at which point the transformer takes over.2

The Zener diode on the chip. It limits the startup voltage to 34 volts. It consists of five diodes in series.

The Zener diode on the chip. It limits the startup voltage to 34 volts. It consists of five diodes in series.

The oscillator

The simplified diagram below shows how the oscillator works. In the first phase (A), the external capacitor is charged through the resistor. When the voltage on the capacitor reaches a fixed level, the comparator (triangle) turns on, energizing the discharge transistor. In the next phase (B), the capacitor discharges through an internal resistor, and then the cycle starts again.3 Thus, by choosing particular values for the external resistor and capacitor, the power supply designer can select the oscillator frequency.

This diagram shows how the oscillator is controlled by an external resistor and capacitor.

This diagram shows how the oscillator is controlled by an external resistor and capacitor.

As mentioned earlier, resistors inside an IC are inaccurate. This poses a problem for the oscillator, since the discharge voltage level is set by resistors. The solution is to tune the resistances by putting fuses in parallel with small resistors and selectively blowing fuses to add the resistors to the circuit.4 Specifically, before the chip is packaged, its performance is measured. To blow a fuse, probes are pressed against the circular contacts and a large current is applied. The additional step of blowing fuses increases the manufacturing cost of the chip, but it provides more precise performance.

Fuses to adjust resistance.

Fuses to adjust resistance.

The oscillator has a second set of fuses to tune the discharge resistance (below). These fuses use a different principle: they are "antifuses", which act like fuses in reverse. An antifuse starts off non-conducting, but passing a high current through it creates a conductive metal spike in the antifuse.5

The discharge circuitry of the oscillator. The antifuses adjust resistance in the oscillator.

The discharge circuitry of the oscillator. The antifuses adjust resistance in the oscillator.

Current mirrors

The current mirror is a fundamental building block in analog circuits. This chip, like many analog chips, needs small, steady currents to drive amplifiers, bias circuits, pull signals up, and perform other tasks. Rather than using separate resistors to generate each current, a common solution is the current mirror: you control one current with resistors, and then use transistors to make copies of this current. The schematic below shows a simple current mirror where the fixed current through the transistor on the left is mirrored into three identical copies.

A basic current mirror circuit. The current on the left is mirrored into three current sinks.

A basic current mirror circuit. The current on the left is mirrored into three current sinks.

The diagram above shows the main current mirrors for the chip. The large resistor in the lower-right controls the current through the main transistor, and the other transistors copy this current.6 Small emitter resistors improve the performance.

The current-mirror circuitry on the die.

The current-mirror circuitry on the die.

The feedback or error amplifier

Next, I'll look at the voltage feedback circuit, which lets the chip know if the output voltage is too high or too low. The chip receives the output voltage, scaled to form a feedback signal. The error amplifier compares the feedback to a reference voltage to determine if the voltage is too high or too low.

The error amplifier is based on a differential amplifier, which amplifies the difference between its two inputs. This circuit is common in analog circuits, forming the heart of an op-amp or a comparator. The basic idea is that a current mirror (the circle at the top) generates a fixed current I. This current gets split between the left path (I1) and the right path (I2). If the transistor on the left has a higher input voltage than the transistor on the right, most of the current will go to the left. But if the transistor on the right has a higher input, most of the current will go to the right. This circuit amplifies the voltage difference: even a small difference between the two inputs will switch most of the current from one side to the other.

A differential pair amplifies the difference between the two inputs.

A differential pair amplifies the difference between the two inputs.

The error amplifier extends this circuit with about a dozen transistors in total. These transistors add buffering to the inputs, control various currents, and provide a second amplification stage. The photo below shows the key components of the error amplifier. The green capacitor on the right stabilizes the amplifier.

The error feedback amplifier as it appears on the die with key components indicated.

The error feedback amplifier as it appears on the die with key components indicated.

The current comparator

The power supply uses voltage feedback to adjust the pulse width, but it also monitors the current through the transformer so the power supply can respond faster to changes in the load. The current feedback is implemented by the "current sense comparator". This is similar to the feedback amplifier, amplifying the difference between the inputs. (Since it is a comparator, not an amplifier, it is designed to output a binary signal instead of an analog level, but the basic principle is the same.) The diagram below shows the key circuitry for the current comparator on the die and how it relates to the block diagram. The output from the error amplifier goes through some circuitry to adjust the voltage levels before entering the comparator.7

How the current sense circuit maps onto the die components.

How the current sense circuit maps onto the die components.

Under-voltage lockout

Another interesting circuit is the under-voltage lockout (UVLO), in the upper-left of the die. The purpose of this circuit is to shut down the chip cleanly if the input voltage falls too low. (This could happen if there is a power failure or even from unplugging the power supply.)

The heart of the UVLO circuit is a bandgap regulator, which provides a voltage reference that will be stable even if the temperature changes. This is surprisingly difficult in an integrated circuit, since the properties of transistors change with temperature. The bandgap regulator uses two transistors of different sizes so they are affected by temperature differently. In the die photo below, Q2 is six times the size of Q1.

The bandgap circuit for the under-voltage lockout.

The bandgap circuit for the under-voltage lockout.

The schematic below shows how the bandgap regulator is constructed. The key factor is the voltage between a transistor's base and its emitter (Vbe), which decreases with temperature. However, ΔVbe, the difference between the two Vbe increases with temperature. With the right resistors, these two factors cancel out, yielding a stable reference voltage. The circuit compares the input voltage to this reference voltage; see the footnote8 for more details.

Schematic of the bandgap regulator. A current mirror directs the same current through both sides of the circuit.

Schematic of the bandgap regulator. A current mirror directs the same current through both sides of the circuit.

In the UVLO circuit, the bandgap reference is used to detect if the chip's input voltage falls too low. Since the input voltage is around 30 volts, a network of resistors (below) scales it to the bandgap voltage (about 1.2 volts) for comparison.9

This set of resistors forms voltage dividers to reduce the input voltage for the bandgap comparator. Note the mask date of "00" as well as the ST Microelectronics logo at the bottom.

This set of resistors forms voltage dividers to reduce the input voltage for the bandgap comparator. Note the mask date of "00" as well as the ST Microelectronics logo at the bottom.

The bandgap voltage reference

The chip uses a second bandgap reference to create an internally-regulated 5 volt supply to power the chip's circuitry. This voltage is also made available to external circuitry that may need an accurate voltage.

At a high level, this voltage reference is a linear power supply, with a power transistor controlling how much of the input voltage passes through to the regulated Vref. The control signal comes from the bandgap regulator, which I'll explain below. The output circuit also has a current-sense resistor to measure the output current. This limits the output current to 50 mA in case of a short circuit. A diode clamps the output if the input voltage suddenly drops.

Schematic of the Vref output circuit. The transistor limits the voltage.

Schematic of the Vref output circuit. The transistor limits the voltage.

The photo below shows how this circuit is implemented on the die. The power transistor is much larger than the other transistors, so it can support a high-current output. The construction of the diode is similar to the power transistor, but without a collector. The current-sense resistor is short and wide, giving it a low resistance.

Vref output circuit on the die.

Vref output circuit on the die.

The heart of the circuit is the bandgap voltage reference below. The circuit is similar to the bandgap voltage reference for the under-voltage lockout circuit, using two transistors, one with six times the area of the other. However, the six-way transistor has been split into two and surrounds the single transistor. With this layout, even if there is a temperature gradient across the die, the single-transistor and the six-transistor will be at the same average temperature.

The transistors at the heart of the bandgap reference.

The transistors at the heart of the bandgap reference.

The accuracy of the bandgap regulator depends on the accuracy of its resistors. During manufacturing, fuses are blown to tune the resistance, as with the oscillator's resistors. The photo below also shows the resistors that form a voltage divider to reduce the 5-volt output to the 1.2-volt bandgap voltage. In contrast to the thin meandering resistors used elsewhere, these resistors are thick and uniform length to improve their accuracy.

Resistors that control the bandgap reference.

Resistors that control the bandgap reference.

Output

At this point, I'll step back and review the chip's function in the power supply. It controls the switching transistor, causing the transistor to send high-voltage pulses through the transformer. The chip does this by producing control pulses on its output pin. Since the switching transistor is fairly large, the chip outputs a relatively high current (200 milliamps) control signal. This requires fairly large output transistors inside the IC.

The controller chip directs the switching transistor to send pulses through the transformer.

The controller chip directs the switching transistor to send pulses through the transformer.

The die photo below shows the IC's two output transistors: the upper one pulls the output high, and the lower one pulls the output to ground. One interesting feature of the chip is that it has two pads on the die for Vin and two pads for ground. The purpose of this is that the output transistors draw a lot of current, which could cause noise fluctuations on the power and ground lines, interfering with the rest of the chip. By providing separate pads, the output transistor is somewhat isolated from the rest of the circuitry.10

Two large transistors drive the output pin.

Two large transistors drive the output pin.

Variants

One interesting thing about this chip is that four different chips are manufactured from the same silicon. The UC3842 has a 16-volt UVLO threshold, while the UC3843 has an 8.5-volt threshold for lower-voltage applications. Other variants of the chip (UC3844 and UC3845) have a flip flop to reduce the pulse duty cycle. These different chips use slightly different metal wiring over the same silicon base. (It's easier to customize the metal layer than the silicon.) The photo below shows some places where the metal wiring has been severed in the UC3842 to change the wiring.

Closeup of the die with some broken connections indicated with arrows.

Closeup of the die with some broken connections indicated with arrows.

Conclusion

Power supplies are usually taken for granted, but they contain a lot of interesting technology. The invention of the power supply control chip in 1975 is a key step in the history of power supply improvements. Modern power supply chips are much more complex, with features to improve efficiency and reduce interference, but the chip that I examined uses the same basic principles.11 Analog chips are built from several important building blocks such as differential amplifiers, current sources, current mirrors, and bandgap voltage references. The UC3842 chip illustrates all of these building blocks, and how they are combined to build complex circuits.

I announce my latest blog posts on Twitter, so follow me at kenshirriff. I also have an RSS feed.

Notes and references

  1. For schematics of power supplies using this UC3842 chip, see this site, near the bottom of the page. 

  2. The idea of a Zener diode is that it blocks current like a normal diode until it reaches the "breakdown voltage", where it starts conducting. Zener diodes are often formed on chips from the emitter-base junction of NPN transistors, which commonly results in a 6.8-volt breakdown voltage. Looking at the photo, you can see 5 transistor-like structures in series. At 6.8 volts each, this generates the 34-volt breakdown voltage shown in the block diagram. 

  3. The oscillator's comparator is set to turn off about 1.6 volts below the level at which it turns on, that is it has hysteresis. This ensures that the capacitor discharges significantly rather than settling around the discharge level. The oscillator design is a bit like the 555 timer, with discharge and charge phases triggered by the capacitor voltage. 

  4. Many of the resistors in the fuse network are made of fixed-length resistors in various combinations. For example, two in parallel gives twice the resistance, while two in series give half the resistance. The advantage of combining fixed-length resistors is that the resistances are more predictable than making resistors of different lengths. The different resistors have roughly binary values, so different combinations of blown fuses select a variety of resistances. 

  5. I think that the chip uses Zener antifuses, since they look similar to NPN transistors without a collector. The process of blowing the antifuse to make it conductive is called a "Zener zap." 

  6. The current mirror uses a buffered-feedback design with emitter degeneration resistors (details). The small emitter resistors improve the output impedance. Three of the transistors in the current mirror are set up to split current, so each sinks one-third of the regular current. Another transistor has a larger emitter resistor, reducing the current; a small change in resistance yields a large change in the current. This illustrates the flexibility of a current mirror to produce different currents. 

  7. The block diagram shows a resistor-diode network between the error amplifier and the current sense comparator. This network scales and clips the error amplifier output to make its levels more useful. The circuitry isn't particularly interesting, so I won't discuss it in detail. I'll mention, though, that the block diagram shows the error amplifier output uses two diodes to drop its voltage. The circuit, on the other hand, raises the other signals by two diode levels instead, which works out the same mathematically. (Transistors are used to implement the diode drops as well as the 1-volt Zener.) 

  8. The details of a bandgap reference are too complex to explain here, but I'll give a brief overview in this footnote. The basis is that the voltage between a transistor's base and emitter scales drops linearly with the temperature (in Kelvin). But since the two transistors have different areas, the two transistors have different scale factors. The difference between the two transistors' base-emitter voltages increases linearly with temperature. By combining a voltage that decreases linearly with temperature and a voltage that increases linearly with temperature, you can create a voltage that remains almost constant with temperature. This voltage turns out to be the bandgap voltage of silicon, about 1.2 volts.

    Scaling and combining these voltages is done by two resistors, so it is important that temperature doesn't affect the resistances. The circuit is designed so that only the ratio between resistances matters, so if temperature affects both resistors equally, the circuit is unaffected. A problem is that a temperature gradient on the chip could affect some resistors more than others, but the chip uses a clever layout technique to avoid this. There are seven resistor segments: one forms a resistor and six are in series to form a resistor with six times the resistance. The one-unit resistor is put in the middle with three segments above and three segments below. If a temperature gradient, for instance, increases the upper resistances, the resistor in the middle will have an "average" increase, while the 6-unit resistor will have three resistor segments with a large increase and three with a small increase, which will cancel out.

    The bandgap circuit doesn't explicitly generate a 1.2-volt output. Instead, it implicitly compares the input voltage with 1.2 volts. The circuit is set up so a 1.2-volt input balances the currents through both transistors. If the voltage increases, the single transistor passes more current than the six-unit transistor. A current mirror forces each side of the circuit to have the same current, with the result that the "extra" current flows through the output. Thus, if the input voltage is high enough, the circuit produces an output current, activating the chip. But if the input voltage is too low, the circuit doesn't produce an output current, shutting down the chip.

    For more information, see the optimistically-titled How to make a bandgap voltage reference in one easy lesson

  9. Another feature of the under-voltage lockout circuit is hysteresis; it has a higher voltage to turn on than to shut off. The purpose of this is to make sure the power supply doesn't oscillate on and off if the input voltage is near the threshold. Hysteresis is implemented through the input voltage divider, which uses three resistors. If the chip is activated, a transistor feeds the supply voltage into the second resistor, increasing the divider's output voltage. The result is that once the chip is active, the supply voltage must drop more to turn the chip off. 

  10. Surprisingly, the chip has two pads for power and two pads for ground, but only single power and ground pins. Instead, two bond wires go from the pads to each external power and ground pin. Although this doesn't provide complete separation between the chip's power and the output circuit's power, it is still beneficial since the bond wires are thicker than the metal traces and have lower resistance.

    Although this IC is usually packaged in an 8-pin package, some manufacturers, such as Fairchild, make versions of the UC3842 in 14-pin packages. The extra pins allow separate pins to be used for the circuitry and output power and grounds. 

  11. While the UC3842 chip was introduced in 1984, the one I examined has a mask date of "00", so this design is from 2000. The power supply itself was from 2005.